Shigeharu MURATA


A Bipolar-Based 0.5 µm BiCMOS Technology on Bonded SOI for High-Speed LSIs
Makoto YOSHIDA Toshiro HIRAMOTO Tsuyoshi FUJIWARA Takashi HASHIMOTO Tetsuya MURAYA Shigeharu MURATA Kunihiko WATANABE Nobuo TAMBA Takahide IKEDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8  pp. 1395-1403
Type of Manuscript:  Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: General Technology
Keyword: 
BiCMOSbonded SOIdouble polysilicon bipolartrench isolationstress
 Summary | Full Text:PDF

A 1.5-ns Cycle-Time 18-kb Pseudo-Dual-Port RAM with 9K Logic Gates
Masato IWABUCHI Masami USAMI Masamori KASHIYAMA Takashi OOMORI Shigeharu MURATA Toshiro HIRAMOTO Takashi HASHIMOTO Yasuhiro NAKAJIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/05/25
Vol. E77-C  No. 5  pp. 749-755
Type of Manuscript:  Special Section PAPER (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
Category: 
Keyword: 
 Summary | Full Text:PDF