Shice NI

An Efficient Parallel SOVA-Based Turbo Decoder for Software Defined Radio on GPU
Rongchun LI Yong DOU Jiaqing XU Xin NIU Shice NI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/05/01
Vol. E97-A  No. 5  pp. 1027-1036
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
GPU, CUDA, SDR, Turbo decoder, SOVA, 
 Summary | Full Text:PDF
Design and Implement of High Performance Crypto Coprocessor
Shice NI Yong DOU Kai CHEN Jie ZHOU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/04/01
Vol. E97-A  No. 4  pp. 989-990
Type of Manuscript:  LETTER
Category: Algorithms and Data Structures
Keyword: 
crypto coprocessor, reconfigurable crypto block, security protocol, accelerator, 
 Summary | Full Text:PDF
Design and Implementation of the Parameterized Multi-Standard High-Throughput Radix-4 Viterbi Decoder on FPGA
Rongchun LI Yong DOU Yuanwu LEI Shice NI Song GUO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2012/05/01
Vol. E95-B  No. 5  pp. 1602-1611
Type of Manuscript:  PAPER
Category: Fundamental Theories for Communications
Keyword: 
multi-standard, radix-4, Viterbi decoder, FPGA, 
 Summary | Full Text:PDF