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A Fully Integrated 1.7-3.125 Gbps Clock and Data Recovery Circuit Using a Gated Frequency Detector
Rong-Jyi YANG Shen-Iuan LIU | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2005/08/01
Vol. E88-C
No. 8
pp. 1726-1730
Type of Manuscript:
Special Section PAPER (Special Section on Papers Selected from AP-ASIC 2004)
Category:
Keyword:
DLL, CDR, dual loop, | | | Summary | Full Text:PDF | |
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Low Voltage and Low Power CMOS Exponential-Control Variable-Gain Amplifier
Weihsing LIU Shen-Iuan LIU | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/04/01
Vol. E87-A
No. 4
pp. 952-954
Type of Manuscript:
LETTER
Category: Circuit Theory
Keyword:
CMOS, low voltage, low power, exponential-control, VGA, | | | Summary | Full Text:PDF | |
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Low-Voltage CMOS Voltage-Mode Divider and Its Application
Weihsing LIU Shen-Iuan LIU | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/02/01
Vol. E87-A
No. 2
pp. 330-334
Type of Manuscript:
Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category:
Keyword:
low-voltage, CMOS, divider, | | | Summary | Full Text:PDF | |
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CMOS Tunable 1/x Circuit and Its Applications
Weihsing LIU Shen-Iuan LIU | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/07/01
Vol. E86-A
No. 7
pp. 1896-1899
Type of Manuscript:
LETTER
Category: Circuit Theory
Keyword:
analog signal processing, CMOS, | | | Summary | Full Text:PDF | |
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