| Sheldon X.-D. TAN
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Fast Analysis of On-Chip Power Grid Circuits by Extended Truncated Balanced Realization Method Duo LI Sheldon X.-D. TAN | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A
No. 12
pp. 3061-3069
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: power grid analysis, model order reduction, truncated balanced realization, | | Summary | Full Text:PDF | |
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