Satoshi KOMATSU


Power Supply Voltage Control for Eliminating Overkills and Underkills in Delay Fault Testing
Masahiro ISHIDA Toru NAKURA Takashi KUSAKA Satoshi KOMATSU Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/10/01
Vol. E99-C  No. 10  pp. 1219-1225
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
power integritypower supply voltage controloverkills and underkillsdelay fault testingautomatic test equipment
 Summary | Full Text:PDF

A Structured Routing Architecture for Practical Application of Character Projection Method in Electron-Beam Direct Writing
Rimon IKENO Takashi MARUYAMA Satoshi KOMATSU Tetsuya IIZUKA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/08/01
Vol. E97-A  No. 8  pp. 1688-1698
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
Electron Beam Direct WritingCharacter ProjectionroutinginterconnectVIA
 Summary | Full Text:PDF

A Flash TDC with 2.6-4.2ps Resolution Using a Group of UnbalancedCMOS Arbiters
Satoshi KOMATSU Takahiro J. YAMAGUCHI Mohamed ABBAS Nguyen Ngoc MAI KHANH James TANDON Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/03/01
Vol. E97-A  No. 3  pp. 777-780
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
flash TDCarbiterslope control
 Summary | Full Text:PDF

High-Throughput Electron Beam Direct Writing of VIA Layers by Character Projection with One-Dimensional VIA Characters
Rimon IKENO Takashi MARUYAMA Satoshi KOMATSU Tetsuya IIZUKA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2458-2466
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
electron beam direct writingcharacter projectionVIAinterconnectrouting
 Summary | Full Text:PDF

Interconnect-Aware Pipeline Synthesis for Array-Based Architectures
Shanghua GAO Hiroaki YOSHIDA Kenshu SETO Satoshi KOMATSU Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/06/01
Vol. E92-A  No. 6  pp. 1464-1475
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
software pipelininginterconnect delayhigh level synthesisschedulingperformance
 Summary | Full Text:PDF

The AMS Extension to System Level Design Language--SpecC
Yu LIU Satoshi KOMATSU Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12  pp. 3397-3407
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: System Level Design
Keyword: 
system level design languageAMSSpecCcontinuous behavior
 Summary | Full Text:PDF

Synchronization Verification in System-Level Design with ILP Solvers
Thanyapat SAKUNKONCHAK Satoshi KOMATSU Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12  pp. 3387-3396
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: System Level Design
Keyword: 
formal verificationSpecC languageevent synchronizationBoolean programsautomatic abstraction refinementassertion-based verification
 Summary | Full Text:PDF

Synchronization Mechanism for Timed/Untimed Mixed-Signal System Level Design Environment
Yu LIU Satoshi KOMATSU Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4  pp. 1018-1026
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
AMS extensionsystem level design languagetimed/untimedmixed-signalsynchronizationSpecC language
 Summary | Full Text:PDF

Low Power and Fault Tolerant Encoding Methods for On-Chip Data Transfer in Practical Applications
Satoshi KOMATSU Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12  pp. 3282-3289
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Low Power Methodology
Keyword: 
bus encodingECC/EDClow powerreliability
 Summary | Full Text:PDF

Irredundant Low Power Address Bus Encoding Techniques Based on Adaptive Codebooks
Satoshi KOMATSU Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 3001-3008
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Power Optimization
Keyword: 
low power encodingaddress bussignal transitionaddress locality
 Summary | Full Text:PDF

Verification of Synchronization in SpecC Description with the Use of Difference Decision Diagrams
Thanyapat SAKUNKONCHAK Satoshi KOMATSU Masahiro FUJITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 3192-3199
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic and High Level Synthesis
Keyword: 
SpecC languageevent synchronizationdifference decision diagrams (DDDs)Boolean programsabstraction refinement
 Summary | Full Text:PDF

An Ultra Low Power Motion Estimation Processor for MPEG2 HDTV Resolution Video
Masayuki MIYAMA Osamu TOOYAMA Naoki TAKAMATSU Tsuyoshi KODAKE Kazuo NAKAMURA Ai KATO Junichi MIYAKOSHI Kousuke IMAMURA Hideo HASHIMOTO Satoshi KOMATSU Mikio YAGI Masao MORIMOTO Kazuo TAKI Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4  pp. 561-569
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Architecture and Algorithms
Keyword: 
HDTVMPEGmotion estimation processorGradient Descent Search algorithmSIMD datapath architecture
 Summary | Full Text:PDF

Approaches for Reducing Power Consumption in VLSI Bus Circuits
Kunihiro ASADA Makoto IKEDA Satoshi KOMATSU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/02/25
Vol. E83-C  No. 2  pp. 153-160
Type of Manuscript:  INVITED PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
Category: 
Keyword: 
low powerreduced signal swingsignal transition reductionbus encoding/decodingtime-domain circuitminimum Hamming-distance detector
 Summary | Full Text:PDF