A Memory-Efficient Hardware Architecture for a Pulse Doppler Radar Vehicle Detector Sang-Dong KIMJong-Hun LEE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/05/01 Vol. E94-ANo. 5pp. 1210-1213 Type of Manuscript: LETTER Category: Digital Signal Processing Keyword: pulse Doppler radar, FFT, memory-efficient hardware, Doppler shift,