Sachio NAITO

A Method of Current Testing for CMOS Digital and Mixed-Signal LSIs
Yukiya MIURA Sachio NAITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/07/25
Vol. E78-D  No. 7  pp. 845-852
Type of Manuscript:  Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems)
Category: 
Keyword: 
current testing (IDDQ testing), built-in test, design for testability, digital and mixed-signal circuit testing, 
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A Reconfigurable Parallel Processor Based on a TDLCA Model
Masahiro TSUNOYAMA Masataka KAWANAKA Sachio NAITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/11/25
Vol. E76-D  No. 11  pp. 1358-1364
Type of Manuscript:  Special Section PAPER (Special Issue on Responsive Computer Systems)
Category: 
Keyword: 
fault tolerant computing, paralel processor, real-time systems, 
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Verification of Register Transfer Level (RTL) Designs
Alberto Palacios PAWLOVSKY Sachio NAITO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1992/11/25
Vol. E75-D  No. 6  pp. 785-791
Type of Manuscript:  Special Section PAPER (Special Issue on Pacific Rim International Symposium on Fault Tolerant Systems)
Category: 
Keyword: 
fault analysis, testing, verification, hardware description languages, regular expressions, directed graphs, 
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Fault Detection for a Butterfly Unit in an FFT Processor
Masahiro TSUNOYAMA Satoshi OOKUMA Sachio NAITO 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1990/08/25
Vol. E73-E  No. 8  pp. 1310-1313
Type of Manuscript:  Special Section LETTER (Special Issue on Fault-Tolerant Systems)
Category: 
Keyword: 
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Buffer a Novel Specification Language for Digital Systems
P. Alberto PALACIOS Sachio NAITO Masahiro TSUNOYAMA 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1987/10/25
Vol. E70-E  No. 10  pp. 902-905
Type of Manuscript:  LETTER
Category: Software Systems
Keyword: 
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