Qingsheng HU

DFE Error Propagation and FEC Interleaving for 400GbE PAM4 Electrical Lane
Yongzheng ZHAN Qingsheng HU Yinhang ZHANG 
Publication Date: 2020/02/01
Vol. E103-C  No. 2  pp. 48-58
Type of Manuscript:  PAPER
Category: Integrated Electronics
PAM4DFE error propagationFEC interleavingBER400GbE
 Summary | Full Text:PDF(2.5MB)

Design and Implementation of High-Speed Input-Queued Switches Based on a Fair Scheduling Algorithm
Qingsheng HU Hua-An ZHAO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 279-287
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
input-queued switchscalable scheduling architecturepacket scheduling
 Summary | Full Text:PDF(755.8KB)