Peilin LIU

A Low-Cost VLSI Architecture of Multiple-Size IDCT for H.265/HEVC
Heming SUN Dajiang ZHOU Peilin LIU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2467-2476
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
HEVC, IDCT, SRAM, area-efficient, video coding, 
 Summary | Full Text:PDF(3.1MB)
Compressive Sensing of Audio Signal via Structured Shrinkage Operators
Sumxin JIANG Rendong YING Peilin LIU Zhenqi LU Zenghui ZHANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/04/01
Vol. E97-A  No. 4  pp. 923-930
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
Lasso, compressive sensing, audio compression, sparse approximation, 
 Summary | Full Text:PDF(4.7MB)
Fast Prediction Unit Selection and Mode Selection for HEVC Intra Prediction
Heming SUN Dajiang ZHOU Peilin LIU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/02/01
Vol. E97-A  No. 2  pp. 510-519
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: 
Keyword: 
intra prediction, high efficiency video coding (HEVC), H.264/AVC, video coding, prediction unit size selection, mode selection, 
 Summary | Full Text:PDF(2.4MB)
Constant Bit-Rate Multi-Stage Rate Control for Rate-Distortion Optimized H.264/AVC Encoders
Shuijiong WU Peilin LIU Yiqing HUANG Qin LIU Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/07/01
Vol. E93-D  No. 7  pp. 1716-1726
Type of Manuscript:  Special Section PAPER (Special Section on Machine Vision and its Applications)
Category: 
Keyword: 
H.264/AVC video CBR transmission, multi-stage rate control, rate-distortion optimization, Lagrange multiplier, bit allocation, 
 Summary | Full Text:PDF(1.8MB)
A High Performance and Low Bandwidth Multi-Standard Motion Compensation Design for HD Video Decoder
Xianmin CHEN Peilin LIU Dajiang ZHOU Jiayi ZHU Xingguang PAN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 253-260
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
high performance, low bandwidth, motion compensation, multi-standard, 2-D cache, 
 Summary | Full Text:PDF(785.5KB)
High Quality and Low Complexity Speech Analysis/Synthesis Based on Sinusoidal Representation
Jianguo TAN Wenjun ZHANG Peilin LIU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/12/01
Vol. E88-D  No. 12  pp. 2893-2896
Type of Manuscript:  LETTER
Category: Speech and Hearing
Keyword: 
LMSE (Least Mean Square Error), peak-picking, successive approximation, sinusoidal representation, 
 Summary | Full Text:PDF(432.4KB)
A Low-Power MPEG-4 Codec LSI for Mobile Video Application
Peilin LIU Li JIANG Hiroshi NAKAYAMA Toshiyuki YOSHITAKE Hiroshi KOMAZAKI Yasuhiro WATANABE Hisakatsu ARAKI Kiyonori MORIOKA Shinhaeng LEE Hajime KUBOSAWA Yukio OTOBE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4  pp. 652-660
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
MPEG-4 codec LSI, clock-gating, motion-estimation algorithm, error resilience, 
 Summary | Full Text:PDF(1.8MB)