Noritaka SHIGEI


Shift-Invariant Associative Memory Based on Homogeneous Neural Networks
Hiromi MIYAJIMA Noritaka SHIGEI Shuji YATSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/10/01
Vol. E88-A  No. 10  pp. 2600-2606
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and its Applications)
Category: 
Keyword: 
associative memoryshift-invarianthomogeneous neural networksmemory capacity
 Summary | Full Text:PDF

Numerical Evaluation of Incremental Vector Quantization Using Stochastic Relaxation
Noritaka SHIGEI Hiromi MIYAJIMA Michiharu MAEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/09/01
Vol. E87-A  No. 9  pp. 2364-2371
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and its Applications)
Category: 
Keyword: 
vector quantizationstochastic relaxationincremental learningK-meansneural-gas
 Summary | Full Text:PDF

A Hybrid Learning Approach to Self-Organizing Neural Network for Vector Quantization
Shinya FUKUMOTO Noritaka SHIGEI Michiharu MAEDA Hiromi MIYAJIMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/09/01
Vol. E86-A  No. 9  pp. 2280-2286
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and its Applications)
Category: Neuro, Fuzzy, GA
Keyword: 
vector quantizationneural-gas networkKohonen's self-organizing mapK-means methodimage compression
 Summary | Full Text:PDF

Reconfiguration Classes and an Optimal Reconfiguration Method within a Reconfiguration Class
Noritaka SHIGEI Hiromi MIYAJIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/12/01
Vol. E85-D  No. 12  pp. 1909-1917
Type of Manuscript:  PAPER
Category: Fault Tolerance
Keyword: 
processor arrayreconfigurationfault tolerantreconfiguration classesinclusion relation
 Summary | Full Text:PDF

Overlapped-Two-Phase Broadcast and Its Evaluation on a Cluster of PCs
Noritaka SHIGEI Masahiro KANDA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/06/01
Vol. E85-D  No. 6  pp. 1039-1042
Type of Manuscript:  LETTER
Category: Computer Systems
Keyword: 
one-to-all broadcasttwo-phase broadcasttree broadcastcluster of PCsMPI
 Summary | Full Text:PDF

Embedding Chordal Rings and Pyramids into Mesh-Connected Computers with Multiple Buses
Noritaka SHIGEI Hiromi MIYAJIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2000/02/25
Vol. E83-D  No. 2  pp. 142-150
Type of Manuscript:  PAPER
Category: Theory/Models of Computation
Keyword: 
mesh-connected computerglobal busembeddingchordal ringpyramid
 Summary | Full Text:PDF

On the Search for Effective Spare Arrangement of Reconfigurable Processor Arrays Using Genetic Algorithm
Noritaka SHIGEI Hiromi MIYAJIMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/09/25
Vol. E81-A  No. 9  pp. 1898-1901
Type of Manuscript:  Special Section LETTER (Special Section on Nonlinear Theory and Its Applications)
Category: Genetic Algorithm
Keyword: 
genetic algorithmprocessor arrayreconfigurationspare arrangement
 Summary | Full Text:PDF

Maximum Finding on One-Way Mesh-Connected Computers with Multiple Buses
Noritaka SHIGEI Hiromi MIYAJIMA Sadayuki MURASHIMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/06/25
Vol. E80-A  No. 6  pp. 1076-1079
Type of Manuscript:  Special Section LETTER (Special Section of Papers Selected from 1996 International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC'96))
Category: 
Keyword: 
mesh-connected computermultiple busesmaximum findingone way communication
 Summary | Full Text:PDF

On Efficient Spare Arrangements and an Algorithm with Relocating Spares for Reconfiguring Processor Arrays
Noritaka SHIGEI Hiromi MIYAJIMA Sadayuki MURASHIMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/06/25
Vol. E80-A  No. 6  pp. 988-995
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1996 International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC'96))
Category: 
Keyword: 
processor arrayreconfigurationfabrication yieldspare processorWSI
 Summary | Full Text:PDF

On Methods for Reconfiguring Processor Arrays
Noritaka SHIGEI Hiromi MIYAJIMA Takayuki ISHIZAKA Sadayuki MURASHIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/08/25
Vol. E79-D  No. 8  pp. 1139-1146
Type of Manuscript:  Special Section PAPER (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
Category: Interconnection Networks
Keyword: 
processor arrayreconfigurationfabrication yieldspare processorWSI
 Summary | Full Text:PDF

On Some Dynamical Properties of Threshold and Homogeneous Networks
Hiromi MIYAJIMA Shuji YATSUKI Noritaka SHIGEI Sadayuki MURASHIMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/11/25
Vol. E77-A  No. 11  pp. 1823-1830
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and Its Applications)
Category: Neural Network and Its Applications
Keyword: 
homogeneous networksthreshold networksdynamicsperiodic sequencestransient sequences
 Summary | Full Text:PDF