IEICE Trans

Nobuyuki TANAKA

Programmable Hardware Accelerator for Finite-State-Machine Processing in Flexible Access Network Systems Saki HATTA Nobuyuki TANAKA Hiroyuki UZAWA Koyo NITTA
Publication: Publication Date: 2021/03/01 Vol. E104-B No. 3 pp. 277-285 Type of Manuscript: PAPER Category: Fiber-Optic Transmission for Communications Keyword: passive optical network, OLT, protocol processing, flexible network, programmable hardware,
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Software-Hardware-Cooperative Protocol Processor for Extendable 10G-EPON MAC Chip Naoki MIURA Akihiko MIYAZAKI Junichi KATO Nobuyuki TANAKA Satoshi SHIGEMATSU Masami URANO Mamoru NAKANISHI Tsugumichi SHIBATA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/01/01 Vol. E98-C No. 1 pp. 45-52 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: protocol processor, communication SoC, software-hardware cooperation, PON, digital circuit, MAC,
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Development of 60 Gb/s-Class Parallel Optical Interconnection Module (ParaBIT-1) Akira OHKI Mitsuo USUI Nobuo SATO Nobuyuki TANAKA Kosuke KATSURA Toshiaki KAGAWA Makoto HIKITA Koji ENBUTSU Shunichi TOHNO Yasuhiro ANDO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/03/01 Vol. E84-C No. 3 pp. 295-303 Type of Manuscript: Special Section PAPER (Special Issue on Optical Interconnects/Optical Signal Processing) Category: Optical Interconnection Systems Keyword: optical interconnect, VCSEL, polymeric waveguide, silicon bipolar IC, ParaBIT,
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Skew-Compensation Technique for Parallel Optical Interconnections Takeshi SAKAMOTO Nobuyuki TANAKA Yasuhiro ANDO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/08/25 Vol. E82-C No. 8 pp. 1428-1434 Type of Manuscript: Special Section PAPER (Joint Special Issue on Recent Progress in Optoelectronics and Communications) Category: Optical Systems and Technologies Keyword: parallel optical interconnection, skew, skew compensation, frame code, frame synchronization, bit synchronization,
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Skew-Compensation Technique for Parallel Optical Interconnections Takeshi SAKAMOTO Nobuyuki TANAKA Yasuhiro ANDO
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1999/08/25 Vol. E82-B No. 8 pp. 1162-1168 Type of Manuscript: Special Section PAPER (Joint Special Issue on Recent Progress in Optoelectronics and Communications) Category: Optical Systems and Technologies Keyword: parallel optical interconnection, skew, skew compensation, frame code, frame synchronization, bit synchronization,
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Para BIT:Parallel Optical Interconnection for Large-Capacity ATM Switching Systems Kosuke KATSURA Yasuhiro ANDO Mitsuo USUI Akira OHKI Nobuo SATO Nobuaki MATSUURA Nobuyuki TANAKA Toshiaki KAGAWA Makoto HIKITA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1999/02/25 Vol. E82-B No. 2 pp. 412-421 Type of Manuscript: INVITED PAPER (Joint Special Issue on Photonics in Switching: Systems and Devices) Category: Assembly and Packaging Technologies Keyword: optical interconnection, ATM switch, VCSEL, optical connector, optical waveguide, multichip,
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ParaBIT: Parallel Optical Interconnection for Large-Capacity ATM Switching Systems Kosuke KATSURA Yasuhiro ANDO Mitsuo USUI Akira OHKI Nobuo SATO Nobuaki MATSUURA Nobuyuki TANAKA Toshiaki KAGAWA Makoto HIKITA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/02/25 Vol. E82-C No. 2 pp. 360-369 Type of Manuscript: INVITED PAPER (Joint Special Issue on Photonics in Switching: Systems and Devices) Category: Assembly and Packaging Technologies Keyword: optical interconnection, ATM switch, VCSEL, optical connector, optical waveguide, multichip,
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Availability of the Overlapped Block Relaxation Newton Method for Nonlinear Large Scale Circuit Simulation Nobuyuki TANAKA Yoshimitsu ARAI Satoru YAMAGUCHI Hisashi TOMIMURO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/02/25 Vol. E78-A No. 2 pp. 152-159 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Computer Aided Design) Category: Keyword: nonlinear, circuit, simulation, overlap, relaxation,
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Mixed Mode Circuit Simulation Using Dynamic Network Separation and Selective Trace Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/03/25 Vol. E77-A No. 3 pp. 454-460 Type of Manuscript: Special Section PAPER (Special Section on the 6th Karuizawa Workshop on Circuits and Systems) Category: Modeling and Simulation Keyword: mixed mode circuit simulation, dynamic partitioning, network separation, latency, selective trace,
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Mixed Mode Circuit Simulation Using Dynamic Partitioning Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1993/03/25 Vol. E76-A No. 3 pp. 292-298 Type of Manuscript: Special Section PAPER (Special Section on the 5th Karuizawa Workshop on Circuits and Systems) Category: Keyword: circuit simulation, mixed mode simulation, dynamic partitioning, hierarchical decomposition, latency,
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Hierarchical Decomposition and Latency for Circuit Simulation by Direct Method Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/03/25 Vol. E75-A No. 3 pp. 347-351 Type of Manuscript: Special Section LETTER (Special Section on the 4th Karuizawa Workshop on Circuits and Systems) Category: Keyword: circuit simulation network tearing, hierarchical decomposition, latency,
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Availability of Waveform Relaxation Method with Local Iteration and Window Partition Techniques Kazuo ENDOH Nobuyuki TANAKA Hideki ASAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1991/05/25 Vol. E74-A No. 5 pp. 1003-1005 Type of Manuscript: Special Section LETTER (Special Issue on 1991 Spring Natl. Conv. IEICE) Category: Nonlinear Problems and Simulation Keyword:
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Large Scale Circuit Simulation System with Dedicated Parallel Processor SMASH Nobuyuki TANAKA Hideki ASAI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1990/12/25 Vol. E73-E No. 12 pp. 1957-1963 Type of Manuscript: Special Section PAPER (Special Issue on the 3rd Karuizawa Workshop on Circuits and Systems) Category: Nonlinear Circuits and Simulation Keyword:
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Hierarchical Decomposition for Circuit Simulation by Direct Method Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1990/12/25 Vol. E73-E No. 12 pp. 1948-1956 Type of Manuscript: Special Section PAPER (Special Issue on the 3rd Karuizawa Workshop on Circuits and Systems) Category: Nonlinear Circuits and Simulation Keyword:
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Special Parallel Machine for LU Decomposition of a Large Scale Circuit Matrix and Its Performance Nobuyuki TANAKA Hideki ASAI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1989/12/25 Vol. E72-E No. 12 pp. 1336-1343 Type of Manuscript: Special Section PAPER (Special Issue on the 2nd Karuizawa Workshop on Circuits and Systems) Category: VLSI Design Technology Keyword:
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