Nobuyuki TANAKA


Software-Hardware-Cooperative Protocol Processor for Extendable 10G-EPON MAC Chip
Naoki MIURA Akihiko MIYAZAKI Junichi KATO Nobuyuki TANAKA Satoshi SHIGEMATSU Masami URANO Mamoru NAKANISHI Tsugumichi SHIBATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/01/01
Vol. E98-C  No. 1  pp. 45-52
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
protocol processorcommunication SoCsoftware-hardware cooperationPONdigital circuitMAC
 Summary | Full Text:PDF

Development of 60 Gb/s-Class Parallel Optical Interconnection Module (ParaBIT-1)
Akira OHKI Mitsuo USUI Nobuo SATO Nobuyuki TANAKA Kosuke KATSURA Toshiaki KAGAWA Makoto HIKITA Koji ENBUTSU Shunichi TOHNO Yasuhiro ANDO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/03/01
Vol. E84-C  No. 3  pp. 295-303
Type of Manuscript:  Special Section PAPER (Special Issue on Optical Interconnects/Optical Signal Processing)
Category: Optical Interconnection Systems
Keyword: 
optical interconnectVCSELpolymeric waveguidesilicon bipolar ICParaBIT
 Summary | Full Text:PDF

Skew-Compensation Technique for Parallel Optical Interconnections
Takeshi SAKAMOTO Nobuyuki TANAKA Yasuhiro ANDO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/08/25
Vol. E82-C  No. 8  pp. 1428-1434
Type of Manuscript:  Special Section PAPER (Joint Special Issue on Recent Progress in Optoelectronics and Communications)
Category: Optical Systems and Technologies
Keyword: 
parallel optical interconnectionskewskew compensationframe codeframe synchronizationbit synchronization
 Summary | Full Text:PDF

Skew-Compensation Technique for Parallel Optical Interconnections
Takeshi SAKAMOTO Nobuyuki TANAKA Yasuhiro ANDO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1999/08/25
Vol. E82-B  No. 8  pp. 1162-1168
Type of Manuscript:  Special Section PAPER (Joint Special Issue on Recent Progress in Optoelectronics and Communications)
Category: Optical Systems and Technologies
Keyword: 
parallel optical interconnectionskewskew compensationframe codeframe synchronizationbit synchronization
 Summary | Full Text:PDF

Para BIT:Parallel Optical Interconnection for Large-Capacity ATM Switching Systems
Kosuke KATSURA Yasuhiro ANDO Mitsuo USUI Akira OHKI Nobuo SATO Nobuaki MATSUURA Nobuyuki TANAKA Toshiaki KAGAWA Makoto HIKITA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1999/02/25
Vol. E82-B  No. 2  pp. 412-421
Type of Manuscript:  INVITED PAPER (Joint Special Issue on Photonics in Switching: Systems and Devices)
Category: Assembly and Packaging Technologies
Keyword: 
optical interconnectionATM switchVCSELoptical connectoroptical waveguidemultichip
 Summary | Full Text:PDF

ParaBIT: Parallel Optical Interconnection for Large-Capacity ATM Switching Systems
Kosuke KATSURA Yasuhiro ANDO Mitsuo USUI Akira OHKI Nobuo SATO Nobuaki MATSUURA Nobuyuki TANAKA Toshiaki KAGAWA Makoto HIKITA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/02/25
Vol. E82-C  No. 2  pp. 360-369
Type of Manuscript:  INVITED PAPER (Joint Special Issue on Photonics in Switching: Systems and Devices)
Category: Assembly and Packaging Technologies
Keyword: 
optical interconnectionATM switchVCSELoptical connectoroptical waveguidemultichip
 Summary | Full Text:PDF

Availability of the Overlapped Block Relaxation Newton Method for Nonlinear Large Scale Circuit Simulation
Nobuyuki TANAKA Yoshimitsu ARAI Satoru YAMAGUCHI Hisashi TOMIMURO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/02/25
Vol. E78-A  No. 2  pp. 152-159
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Computer Aided Design)
Category: 
Keyword: 
nonlinearcircuitsimulationoverlaprelaxation
 Summary | Full Text:PDF

Mixed Mode Circuit Simulation Using Dynamic Network Separation and Selective Trace
Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/03/25
Vol. E77-A  No. 3  pp. 454-460
Type of Manuscript:  Special Section PAPER (Special Section on the 6th Karuizawa Workshop on Circuits and Systems)
Category: Modeling and Simulation
Keyword: 
mixed mode circuit simulationdynamic partitioningnetwork separationlatencyselective trace
 Summary | Full Text:PDF

Mixed Mode Circuit Simulation Using Dynamic Partitioning
Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/03/25
Vol. E76-A  No. 3  pp. 292-298
Type of Manuscript:  Special Section PAPER (Special Section on the 5th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
circuit simulationmixed mode simulationdynamic partitioninghierarchical decompositionlatency
 Summary | Full Text:PDF

Hierarchical Decomposition and Latency for Circuit Simulation by Direct Method
Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/03/25
Vol. E75-A  No. 3  pp. 347-351
Type of Manuscript:  Special Section LETTER (Special Section on the 4th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
circuit simulation network tearinghierarchical decompositionlatency
 Summary | Full Text:PDF

Availability of Waveform Relaxation Method with Local Iteration and Window Partition Techniques
Kazuo ENDOH Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1991/05/25
Vol. E74-A  No. 5  pp. 1003-1005
Type of Manuscript:  Special Section LETTER (Special Issue on 1991 Spring Natl. Conv. IEICE)
Category: Nonlinear Problems and Simulation
Keyword: 
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Large Scale Circuit Simulation System with Dedicated Parallel Processor SMASH
Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1990/12/25
Vol. E73-E  No. 12  pp. 1957-1963
Type of Manuscript:  Special Section PAPER (Special Issue on the 3rd Karuizawa Workshop on Circuits and Systems)
Category: Nonlinear Circuits and Simulation
Keyword: 
 Summary | Full Text:PDF

Hierarchical Decomposition for Circuit Simulation by Direct Method
Masakatsu NISHIGAKI Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1990/12/25
Vol. E73-E  No. 12  pp. 1948-1956
Type of Manuscript:  Special Section PAPER (Special Issue on the 3rd Karuizawa Workshop on Circuits and Systems)
Category: Nonlinear Circuits and Simulation
Keyword: 
 Summary | Full Text:PDF

Special Parallel Machine for LU Decomposition of a Large Scale Circuit Matrix and Its Performance
Nobuyuki TANAKA Hideki ASAI 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1989/12/25
Vol. E72-E  No. 12  pp. 1336-1343
Type of Manuscript:  Special Section PAPER (Special Issue on the 2nd Karuizawa Workshop on Circuits and Systems)
Category: VLSI Design Technology
Keyword: 
 Summary | Full Text:PDF