IEICE Trans

Nobutaka KITO

Rapid Single-Flux-Quantum Truncated Multiplier Based on Bit-Level Processing Nobutaka KITO Ryota ODAKA Kazuyoshi TAKAGI
Publication: Publication Date: 2019/07/01 Vol. E102-C No. 7 pp. 607-611 Type of Manuscript: BRIEF PAPER Category: Superconducting Electronics Keyword: rapid single flux quantum circuit, truncated multiplier, pulse logic,
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Floating-Point Multiplier with Concurrent Error Detection Capability by Partial Duplication Nobutaka KITO Kazushi AKIMOTO Naofumi TAKAGI
Publication: Publication Date: 2017/03/01 Vol. E100-D No. 3 pp. 531-536 Type of Manuscript: PAPER Category: Dependable Computing Keyword: concurrent error detection, floating-point multiplier, duplication, truncated multiplier,
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Circuit Description and Design Flow of Superconducting SFQ Logic Circuits Kazuyoshi TAKAGI Nobutaka KITO Naofumi TAKAGI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/03/01 Vol. E97-C No. 3 pp. 149-156 Type of Manuscript: INVITED PAPER (Special Section on Leading-Edge Technology of Superconductor Large-Scale Integrated Circuits) Category: Keyword: single-flux-quantum circuit, design methodology, circuit description, logic design, layout design, design verification,
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Low-Overhead Fault-Secure Parallel Prefix Adder by Carry-Bit Duplication Nobutaka KITO Naofumi TAKAGI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2013/09/01 Vol. E96-D No. 9 pp. 1962-1970 Type of Manuscript: Special Section PAPER (Special Section on Dependable Computing) Category: Keyword: parity prediction, parallel prefix adder, fault secure, carry-bit duplication,
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A C-Testable Multiple-Block Carry Select Adder Nobutaka KITO Shinichi FUJII Naofumi TAKAGI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2012/04/01 Vol. E95-D No. 4 pp. 1084-1092 Type of Manuscript: PAPER Category: Dependable Computing Keyword: carry select adder, design for testability, C-testability,
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A C-Testable 4-2 Adder Tree for an Easily Testable High-Speed Multiplier Nobutaka KITO Kensuke HANAI Naofumi TAKAGI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/10/01 Vol. E93-D No. 10 pp. 2783-2791 Type of Manuscript: PAPER Category: Information Network Keyword: multiplier, design for testability, 4-2 adder tree, C-testability,
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