Nobuhiro TOMABECHI


Design of a Reconfigurable Parallel Processor for Digital Control Using FPGAs
Yoshichika FUJIOKA Michitaka KAMEYAMA Nobuhiro TOMABECHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/07/25
Vol. E77-C  No. 7  pp. 1123-1130
Type of Manuscript:  Special Section PAPER (Special Issue on Super Chip for Intelligent Integrated Systems)
Category: 
Keyword: 
delay timemulti-operand multiply-additionreconfigurationdigital controlFPGA
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Fault-Tolerant Digital Filters Using Pulse-Train Residue Arithmetic Circuits
Moon Soo KIM Nobuhiro TOMABECHI 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1987/10/25
Vol. E70-E  No. 10  pp. 1009-1017
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
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