Naoya TORII


Experimental Evaluation on the Resistance of Latch PUFs Implemented on ASIC against FIB-Based Invasive Attacks
Naoya TORII Dai YAMAMOTO Masahiko TAKENAKA Tsutomu MATSUMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/01/01
Vol. E99-A  No. 1  pp. 118-129
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: 
Keyword: 
PUFFIBRS-latch
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FOREWORD
Naoya TORII 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/01/01
Vol. E95-A  No. 1  pp. 1-1
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
 Summary | Full Text:PDF

Design Optimization of a High-Speed, Area-Efficient and Low-Power Montgomery Modular Multiplier for RSA Algorithm
Shoichi MASUI Kenji MUKAIDA Masahiko TAKENAKA Naoya TORII 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4  pp. 576-581
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Digital
Keyword: 
public key cryptosystemRSA algorithmMontgomery algorithmmodular multiplicationmultiplier-accumulator
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Extended Key Management System Using Complementary Exponential Calculation
Naoya TORII Takayuki HASEBE Ryota AKIYAMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/01/25
Vol. E76-A  No. 1  pp. 78-87
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: 
Keyword: 
key managementID-basedRSAcomplementary exponential calculation
 Summary | Full Text:PDF