Naoshi YANAGISAWA


An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter
Shiro DOSHO Naoshi YANAGISAWA Kazuaki SOGAWA Yuji YAMADA Takashi MORIE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6  pp. 1197-1202
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
loop filterswitched capacitorphase locked loopdigital controladaptive control
 Summary | Full Text:PDF

A Design of Compact PLL with Adaptive Active Loop Filter Circuit
Shiro DOSHO Naoshi YANAGISAWA Masaomi TOYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6  pp. 949-955
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
PLLadaptive biasingLPFcompact0.15 µm-CMOS
 Summary | Full Text:PDF

Development of a CMOS Data Recovery PLL for DVD-ROMx14
Shiro DOSHO Naoshi YANAGISAWA Seiji WATANABE Takahiro BOKUI Kazuhiko NISHIKAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/04/01
Vol. E85-A  No. 4  pp. 764-769
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
DVD-ROMdata recoveryjitter detectorlow powerfrequency detector
 Summary | Full Text:PDF