Naoki KASAI


Shared Write-Selection Transistor Cell and Leakage-Replication Read Scheme for Large Capacity MRAM Macros
Ryusuke NEBASHI Noboru SAKIMURA Tadahiko SUGIBAYASHI Naoki KASAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4  pp. 417-422
Type of Manuscript:  Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
MRAMembedded memorySoCsystem LSI
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MRAM Applications Using Unlimited Write Endurance
Tadahiko SUGIBAYASHI Takeshi HONDA Noboru SAKIMURA Shuichi TAHARA Naoki KASAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/10/01
Vol. E90-C  No. 10  pp. 1936-1940
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market)
Category: Next-Generation Memory for SoC
Keyword: 
MRAMdrive recorderasynchronous SRAMpseudo SRAMdemo system
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Writing Circuitry for Toggle MRAM to Screen Intermittent Failure Mode
Takeshi HONDA Noboru SAKIMURA Tadahiko SUGIBAYASHI Naoki KASAI Hiromitsu HADA Shu-ichi TAHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/02/01
Vol. E90-C  No. 2  pp. 531-535
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
MRAMtoggleintermittent failure
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Gate-Last MISFET Structures and Process for Characterization of High-k and Metal Gate MISFETs
Takeo MATSUKI Kazuyoshi TORII Takeshi MAEDA Yasushi AKASAKA Kiyoshi HAYASHI Naoki KASAI Tsunetoshi ARIKADO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/05/01
Vol. E88-C  No. 5  pp. 804-810
Type of Manuscript:  Special Section PAPER (Special Section on Microelectronic Test Structures)
Category: 
Keyword: 
MOSFEThigh-kmetal-gategate-last
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FOREWORD
Naoki KASAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/05/01
Vol. E88-C  No. 5  pp. 781-781
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
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Measuring Contact Resistance of a Poly-Silicon Plug on a Lightly Doped Single-Diffusion Region in DRAM Cells
Naoki KASAI Hiroki KOGA Yoshihiro TAKAISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/05/01
Vol. E85-C  No. 5  pp. 1146-1150
Type of Manuscript:  Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: 
Keyword: 
test structurecontact resistancepoly-silicon plugDRAM cell
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Effects of Field Edge Steps on Electrical Gate Linewidth Measurements
Naoki KASAI Ichiro YAMAMOTO Koji URABE Kuniaki KOYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/02/25
Vol. E79-C  No. 2  pp. 152-157
Type of Manuscript:  Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: Device and Circuit Characterization
Keyword: 
test structureMOSFETlinewidthfield step
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A Capacitor over Bit-Line (COB) Stacked Capacitor Cell Using Local Interconnect Layer for 64 MbDRAMs
Naoki KASAI Masato SAKAO Toshiyuki ISHIJIMA Eiji IKAWA Hirohito WATANABE Toshio TAKESHIMA Nobuhiro TANABE Kazuo TERADA Takamaro KIKKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/25
Vol. E76-C  No. 4  pp. 548-555
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Category: Device Technology
Keyword: 
DRAMmemory cellstacked capacitorlocal interconnect
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