Naohiko SHIMIZU


Design of sfl2vl: SFL to Verilog Converter Based on an LR-Parser
Naohiko SHIMIZU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 3225-3229
Type of Manuscript:  Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category: Design Methodology
Keyword: 
logic synthesisHDL conversionSFLverilog
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Pipelining Gauss Seidel Method for Analysis of Discrete Time Cellular Neural Networks
Naohiko SHIMIZU Gui-Xin CHENG Munemitsu IKEGAMI Yoshinori NAKAMURA Mamoru TANAKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/08/25
Vol. E77-A  No. 8  pp. 1396-1403
Type of Manuscript:  PAPER
Category: Neural Networks
Keyword: 
cellular neural networksdynamicsnumerical analysisrelaxation methodpipeliningimage codingimage decodingstructural compressionregularizationcommunication system
 Summary | Full Text:PDF