Nagatoshi OHKI


A 6.93-µm2 Full CMOS SRAM Cell Technology for 1.8-V High-Performance Cache Memory
Masataka MINAMI Nagatoshi OHKI Hiroshi ISHIDA Toshiaki YAMANAKA Akihiro SHIMIZU Koichiro ISHIBASHI Akira SATOH Tokuo KURE Takashi NISHIDA Takahiro NAGANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/04/25
Vol. E80-C  No. 4  pp. 590-596
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
SRAMfull CMOS celllocal interconnectTiN
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A 6-ns 4-Mb CMOS SRAM with Offset-Voltage-Insensitive Current Sense Amplifiers
Koichiro ISHIBASHI Koichi TAKASUGI Kunihiro KOMIYAJI Hiroshi TOYOSHIMA Toshiaki YAMANAKA Akira FUKAMI Naotaka HASHIMOTO Nagatoshi OHKI Akihiro SHIMIZU Takashi HASHIMOTO Takahiro NAGANO Takashi NISHIDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/06/25
Vol. E78-C  No. 6  pp. 728-734
Type of Manuscript:  Special Section PAPER (Special Issue on the 1994 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol. 30, No. 4 April 1995))
Category: 
Keyword: 
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