Muneo FUKAISHI


Channel-Count-Independent BIST for Multi-Channel SerDes
Kouichi YAMAGUCHI Muneo FUKAISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 314-319
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: Interface and Interconnect Techniques
Keyword: 
SerDesBISTat-speed testingPRBSmulti-channel synchronization
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Design Innovations for Multi-Gigahertz-Rate Communication Circuits with Deep-Submicron CMOS Technology
Masakazu KURISU Muneo FUKAISHI Hiroshi ASAZAWA Masato NISHIKAWA Kazuyuki NAKAMURA Michio YOTSUYANAGI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/03/25
Vol. E82-C  No. 3  pp. 428-437
Type of Manuscript:  INVITED PAPER (Special Issue on Ultra-High-Speed IC and LSI Technology)
Category: 
Keyword: 
CMOSdeep-submicroncommunicationGigahertz
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A 1.3 V Supply Voltage AlGaAs/InGaAs HJFET SCFL D-FF Operating at up to 10 Gbps
Masahiro FUJII Tadashi MAEDA Yasuo OHNO Masatoshi TOKUSHIMA Masaoki ISHIKAWA Muneo FUKAISHI Hikaru HIDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/04/25
Vol. E79-C  No. 4  pp. 512-517
Type of Manuscript:  Special Section PAPER (Special Issue on Ultra-High-Speed LSIs)
Category: 
Keyword: 
low powerhigh speedGaAsheterojunction FETSCFLlogic swinglow supply voltageD-FF
 Summary | Full Text:PDF