Motomu UKITA

A 4-Mb SRAM Using a New Hierarchical Bit Line Organization Utilizing a T-Shaped Bit Line for a Small Sized Die
Yoshiyuki HARAGUCHI Toshihiko HIROSE Motomu UKITA Tomohisa WADA Masanao EINO Minoru SAITO Michihiro YAMADA Akihiko YASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/06/25
Vol. E79-C  No. 6  pp. 743-749
Type of Manuscript:  Special Section PAPER (Special Issue on ULSI Memory Technology)
Category: Static RAMs
Keyword: 
integrated electronics, high density SRAM, hierarchical bit line organization, T-shaged bit line, 
 Summary | Full Text:PDF
A New Soft-Error Phenomenon is ULSI SRAM's--Inverted Dependence of Soft-Error Rate on Cycle Time--
Shuji MURAKAMI Tomohisa WADA Masanao EINO Motomu UKITA Yasumasa NISHIMURA Kimio SUZUKI Kenji ANAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1991/04/25
Vol. E74-C  No. 4  pp. 853-858
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: SRAM
Keyword: 
 Summary | Full Text:PDF