Mitsuru SAKAMOTO


A 65 Kbit Dynamic RAM Using Short Channel MOS FETs
Masahide TAKADA Toshio TAKESHIMA Shunichi SUZUKI Mitsuru SAKAMOTO 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1979/07/25
Vol. E62-E  No. 7  pp. 484-485
Type of Manuscript:  LETTER
Category: Integrated Circuits
Keyword: 
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