Mitsuo IKEDA

An H.264/AVC High422 Profile and MPEG-2 422 Profile Encoder LSI for HDTV Broadcasting Infrastructures
Koyo NITTA Hiroe IWASAKI Takayuki ONISHI Takashi SANO Atsushi SAGATA Yasuyuki NAKAJIMA Minoru INAMORI Ryuichi TANIDA Atsushi SHIMIZU Ken NAKAMURA Mitsuo IKEDA Jiro NAGANUMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 432-440
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
H.264/AVC, encoder, MPSoC, ME/MC, and HDTV, 
 Summary | Full Text:PDF
Three-Layer Cooperative Architecture for MPEG-2 Video Encoder LSI
Mitsuo IKEDA Toshio KONDO Koyo NITTA Kazuhito SUGURI Takeshi YOSHITOME Toshihiro MINAMI Jiro NAGANUMA Takeshi OGURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/02/25
Vol. E83-C  No. 2  pp. 170-178
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power High-Speed CMOS LSI Technologies)
Category: 
Keyword: 
MPEG-2, video signal processing, embedded system LSI, hardware/software co-design, picture coding, 
 Summary | Full Text:PDF
High-Level Synthesis Using Given Datapath Information
Toshiaki MIYAZAKI Mitsuo IKEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A  No. 10  pp. 1617-1625
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
control circuit, scheduling, resource allocation, RTL, CFG, DFG, 
 Summary | Full Text:PDF