Mitaro NAMIKI

A Software-based NVM Emulator Supporting Read/Write Asymmetric Latencies
Atsushi KOSHIBA Takahiro HIROFUCHI Ryousei TAKANO Mitaro NAMIKI 
Publication:   
Publication Date: 2019/12/01
Vol. E102-D  No. 12  pp. 2377-2388
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Computer System
Keyword: 
middleware, non-volatile memory, performance emulation, asymmetric read/write latencies, write-back awareness, 
 Summary | Full Text:PDF(1.6MB)
An Operating System Guided Fine-Grained Power Gating Control Based on Runtime Characteristics of Applications
Atsushi KOSHIBA Mikiko SATO Kimiyoshi USAMI Hideharu AMANO Ryuichi SAKAMOTO Masaaki KONDO Hiroshi NAKAMURA Mitaro NAMIKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/08/01
Vol. E99-C  No. 8  pp. 926-935
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
energy conservation, power gating, operating system, microprocessor, 
 Summary | Full Text:PDF(2.7MB)
A Fine-Grained Power Gating Control on Linux Monitoring Power Consumption of Processor Functional Units
Atsushi KOSHIBA Motoki WADA Ryuichi SAKAMOTO Mikiko SATO Tsubasa KOSAKA Kimiyoshi USAMI Hideharu AMANO Masaaki KONDO Hiroshi NAKAMURA Mitaro NAMIKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/07/01
Vol. E98-C  No. 7  pp. 559-568
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
energy conservation, power gating, operating system, Linux, 
 Summary | Full Text:PDF(2.1MB)
Fine-Grained Run-Tume Power Gating through Co-optimization of Circuit, Architecture, and System Software Design
Hiroshi NAKAMURA Weihan WANG Yuya OHTA Kimiyoshi USAMI Hideharu AMANO Masaaki KONDO Mitaro NAMIKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4  pp. 404-412
Type of Manuscript:  INVITED PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
low-power circuit techniques, fine grained power-gating, compiler, system hierarchy cooperation, 
 Summary | Full Text:PDF(3.1MB)
A Leakage Efficient Instruction TLB Design for Embedded Processors
Zhao LEI Hui XU Daisuke IKEBUCHI Tetsuya SUNATA Mitaro NAMIKI Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/08/01
Vol. E94-D  No. 8  pp. 1565-1574
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
leakage power, TLB, embedded processor, 
 Summary | Full Text:PDF(1.3MB)
A Leakage Efficient Data TLB Design for Embedded Processors
Zhao LEI Hui XU Daisuke IKEBUCHI Tetsuya SUNATA Mitaro NAMIKI Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/01/01
Vol. E94-D  No. 1  pp. 51-59
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
leakage power, TLB, embedded processor, 
 Summary | Full Text:PDF(921.7KB)