Minxuan ZHANG


Architecture and Implementation of a Reduced EPIC Processor
Jun GAO Minxuan ZHANG Zuocheng XING Chaochao FENG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/01/01
Vol. E96-D  No. 1  pp. 9-18
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
ILPEPICIA-64processor architecturehardware implementation
 Summary | Full Text:PDF(1.8MB)

A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip
Chaochao FENG Zhonghai LU Axel JANTSCH Minxuan ZHANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/05/01
Vol. E95-D  No. 5  pp. 1519-1522
Type of Manuscript:  LETTER
Category: Computer System
Keyword: 
3D NoCbufferless routerpermutation network
 Summary | Full Text:PDF(369.5KB)

Support Efficient and Fault-Tolerant Multicast in Bufferless Network-on-Chip
Chaochao FENG Zhonghai LU Axel JANTSCH Minxuan ZHANG Xianju YANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/04/01
Vol. E95-D  No. 4  pp. 1052-1061
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
bufferless network-on-chipdeflection routingmulticastfault-tolerance
 Summary | Full Text:PDF(1.8MB)

Accurate and Simplified Prediction of L2 Cache Vulnerability for Cost-Efficient Soft Error Protection
Yu CHENG Anguo MA Minxuan ZHANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/01/01
Vol. E95-D  No. 1  pp. 56-66
Type of Manuscript:  Special Section PAPER (Special Section on Trust, Security and Privacy in Computing and Communication Systems)
Category: Trust
Keyword: 
architectural vulnerability factor (AVF)AVF modeling and predictionAVF-aware protectioncost-efficientL2 cache
 Summary | Full Text:PDF(1.1MB)

Dynamic Program Behavior Identification for High Performance CMPs with Private LLCs
Xiaomin JIA Pingjing LU Caixia SUN Minxuan ZHANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/12/01
Vol. E93-D  No. 12  pp. 3211-3222
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
chip multi-processors (CMPs)performanceprogram behaviorlast-level cache (LLC)spilling
 Summary | Full Text:PDF(3.2MB)