An Energy Efficient Instruction Window for Scalable Processor Architecture Min CHOISeungryoul MAENG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/09/01 Vol. E91-CNo. 9pp. 1427-1436 Type of Manuscript: Special Section PAPER (Special Section on Advanced Processors Based on Novel Concepts in Computation) Category: Keyword: instruction window, superscalar, low-power microarchitecture, reorder buffer, issue queue,