Mikihiro KAJITA

A Clock Generator with Clock Period, Duty-Ratio and I/Q-Balance Adjustment Capabilities for On-Chip Timing-Margin Tests
Shunichi KAERIYAMA Mikihiro KAJITA Masayuki MIZUNO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/01/01
Vol. E94-C  No. 1  pp. 102-109
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
clock generator, duty ratio, frequency synthesis, I/Q balance, jitter, timing margin, 
 Summary | Full Text:PDF
Full Chip Circuit/Substrate Macro Modeling Method Which Controls the Analysis Accuracy and CPU Time by Using Current Density
Mikiko Sode TANAKA Mikihiro KAJITA Naoya NAKAYAMA Satoshi NAKAMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2  pp. 448-455
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
substrate noise, power supply noise, substrate modeling, clock jitter, high speed, 
 Summary | Full Text:PDF
A Multiple Wavelength Vertical-Cavity Surface-Emitting Laser (VCSEL) Array for Optical Interconnection
Ichiro OGURA Kaori KURIHARA Shigeru KAWAI Mikihiro KAJITA Kenichi KASAHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/01/25
Vol. E78-C  No. 1  pp. 22-27
Type of Manuscript:  INVITED PAPER (Special Issue on Ultrafast Optoelectronics)
Category: 
Keyword: 
surface-emitting lasers, optical interconnection, wavelength-division multiplexing, 
 Summary | Full Text:PDF