IEICE Trans

Michio YOKOYAMA

Flexible and Printable Phase Shifter with Polymer Actuator for 12-GHz Band Fumio SATO Michio YOKOYAMA Yudai USAMI Kentaro YAZAWA Takao KUKI Shizuo TOKITO
Publication: Publication Date: 2018/10/01 Vol. E101-C No. 10 pp. 767-774 Type of Manuscript: Special Section PAPER (Special Section on Microwave and Millimeter-Wave Technologies) Category: Keyword: phased array antenna, phase shifter, 3dB, 90° hybrid coupler, polymer actuator, ionic liquid, microstrip line, insertion loss,
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VLSI Implementation of a 44-bit Multiplier in a Two Phase Drive Adiabatic Dynamic CMOS Logic Yasuhiro TAKAHASHI Toshikazu SEKINE Michio YOKOYAMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/10/01 Vol. E90-C No. 10 pp. 2002-2006 Type of Manuscript: Special Section LETTER (Special Section on VLSI Technology toward Frontiers of New Market) Category: Keyword: adiabatic logic, multiplier, low power, two-phase power supply,
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A 70 MHz Multiplierless FIR Hilbert Transformer in 0.35 µm Standard CMOS Library Yasuhiro TAKAHASHI Toshikazu SEKINE Michio YOKOYAMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/07/01 Vol. E90-A No. 7 pp. 1376-1383 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: Hilbert transformer, multiplierless, FIR filter, multiple constant multiplication (MCM), canonic signed digit (CSD),
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Carry Propagation Free Adder/Subtracter Using Adiabatic Dynamic CMOS Logic Circuit Technology Yasuhiro TAKAHASHI Kei-ichi KONTA Kazukiyo TAKAHASHI Michio YOKOYAMA Kazuhiro SHOUNO Mitsuru MIZUNUMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/06/01 Vol. E86-A No. 6 pp. 1437-1444 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2002 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2002)) Category: Keyword: adiabatic dynamic CMOS logic (ADCL), carry propagation free, adder/subtracter, VLSI, redundant binary,
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A New Concept of 3-Dimentional Multilayer-Stacked System-in-Package for Software-Defined-Radio Kazuo TSUBOUCHI Michio YOKOYAMA Hiroyuki NAKASE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/12/01 Vol. E84-C No. 12 pp. 1730-1734 Type of Manuscript: Special Section PAPER (Special Issue on Integrated Systems with New Concepts) Category: Keyword: system-in-package, wireless communication, flip-chip bump bonding, 3-D stacked package, vertical bus line,
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