IEICE Trans

Masayuki YOSHINO

Key Update Mechanism Using All-or-Nothing Transform for Network Storage of Encrypted Data Dai WATANABE Masayuki YOSHINO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2015/01/01 Vol. E98-A No. 1 pp. 162-170 Type of Manuscript: Special Section PAPER (Special Section on Cryptography and Information Security) Category: Foundation Keyword: re-encryption, all-or-nothing transform, cryptographic key management,
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Random Sampling Reduction with Precomputation Masayuki YOSHINO Noboru KUNIHIRO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/01/01 Vol. E96-A No. 1 pp. 150-157 Type of Manuscript: Special Section PAPER (Special Section on Cryptography and Information Security) Category: Foundations Keyword: random sampling reduction, precomputation, lattice reduction, size reduction, lattice-based cryptography,
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Recursive Double-Size Modular Multiplications from Euclidean and Montgomery Multipliers Masayuki YOSHINO Katsuyuki OKEYA Camille VUILLAUME
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/01/01 Vol. E93-A No. 1 pp. 180-187 Type of Manuscript: Special Section PAPER (Special Section on Cryptography and Information Security) Category: Mathematics Keyword: modular multiplication, RSA, efficient implementation, low-end device, double-size technique,
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Faster Double-Size Bipartite Multiplication out of Montgomery Multipliers Masayuki YOSHINO Katsuyuki OKEYA Camille VUILLAUME
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/08/01 Vol. E92-A No. 8 pp. 1851-1858 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Theory Keyword: Montgomery multiplication, double-size technique, RSA, efficient implementation, smartcard,
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Montgomery Multiplication with Twice the Bit-Length of Multipliers Masayuki YOSHINO Katsuyuki OKEYA Camille VUILLAUME
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/01/01 Vol. E91-A No. 1 pp. 203-210 Type of Manuscript: Special Section PAPER (Special Section on Cryptography and Information Security) Category: Implementation Keyword: Montgomery multiplication, RSA, crypto-coprocessor, smartcard,
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