IEICE Trans

Masayuki MIYAMA

FPGA Implementation of 3-Bit Quantized Multi-Task CNN for Contour Detection and Disparity Estimation Masayuki MIYAMA
Publication: Publication Date: 2022/02/01 Vol. E105-D No. 2 pp. 406-414 Type of Manuscript: PAPER Category: Image Recognition, Computer Vision Keyword: contour detection, disparity estimation, Multi-Task, convolutional neural network, stereo vision, FPGA,
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A VGA 30 fps Affine Motion Model Estimation VLSI for Real-Time Video Segmentation Yoshiki YUNBE Masayuki MIYAMA Yoshio MATSUDA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/12/01 Vol. E93-D No. 12 pp. 3284-3293 Type of Manuscript: PAPER Category: Computer System Keyword: affine motion model, motion estimation, video segmentation, real-time processing, VLSI, FPGA,
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A Complete Charge Recycling TCAM with Checkerboard Array Arrangement for Low Power Applications Katsumi DOSAKA Daisuke OGAWA Takahito KUSUMOTO Masayuki MIYAMA Yoshio MATSUDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/05/01 Vol. E93-C No. 5 pp. 685-695 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: TCAM, charge recycling, low power, low noise, low operating current,
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A 158 MS/s JPEG 2000 Codec with a Bit-Plane and Pass Parallel Embedded Block Coder for Low Delay Image Transmission Masayuki MIYAMA Yuusuke INOIE Takafumi KASUGA Ryouichi INADA Masashi NAKAO Yoshio MATSUDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/08/01 Vol. E91-A No. 8 pp. 2025-2034 Type of Manuscript: Special Section PAPER (Special Section on Signal Processing) Category: Keyword: JPEG 2000, EBCOT, VLSI, low delay, image transmission,
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A VGA 30-fps Realtime Optical-Flow Processor Core for Moving Picture Recognition Yuichiro MURACHI Yuki FUKUYAMA Ryo YAMAMOTO Junichi MIYAKOSHI Hiroshi KAWAGUCHI Hajime ISHIHARA Masayuki MIYAMA Yoshio MATSUDA Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/04/01 Vol. E91-C No. 4 pp. 457-464 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories) Category: Keyword: optical flow, real-time video recognition, VLSI processor,
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A Sub-mW H.264 Baseline-Profile Motion Estimation Processor Core with a VLSI-Oriented Block Partitioning Strategy and SIMD/Systolic-Array Architecture Junichi MIYAKOSHI Yuichiro MURACHI Tetsuro MATSUNO Masaki HAMAMOTO Takahiro IINUMA Tomokazu ISHIHARA Hiroshi KAWAGUCHI Masayuki MIYAMA Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/12/01 Vol. E89-A No. 12 pp. 3623-3633 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Architecture Keyword: low power, motion estimation, H.264, SIMD, systolic array,
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VLSI Architecture Study of a Real-Time Scalable Optical Flow Processor for Video Segmentation Noriyuki MINEGISHI Junichi MIYAKOSHI Yuki KURODA Tadayoshi KATAGIRI Yuki FUKUYAMA Ryo YAMAMOTO Masayuki MIYAMA Kousuke IMAMURA Hideo HASHIMOTO Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/03/01 Vol. E89-C No. 3 pp. 230-242 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era) Category: System LSIs and Microprocessors Keyword: optical flow, processor architecture, video segmentation,
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A 95 mW MPEG2 MP@HL Motion Estimation Processor Core for Portable High-Resolution Video Application Yuichiro MURACHI Koji HAMANO Tetsuro MATSUNO Junichi MIYAKOSHI Masayuki MIYAMA Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3492-3499 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Architecture Keyword: low power, motion estimation, MPEG2, HDTV, IP,
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Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era Kentaro KAWAKAMI Miwako KANAMORI Yasuhiro MORITA Jun TAKEMURA Masayuki MIYAMA Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-A No. 12 pp. 3290-3297 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Low Power Methodology Keyword: low power, dynamic voltage frequency scaling (DVFS), adaptive body biasing, V_dd-hopping, V_th-hopping,
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A Low-Power Systolic Array Architecture for Block-Matching Motion Estimation Junichi MIYAKOSHI Yuichiro MURACHI Koji HAMANO Tetsuro MATSUNO Masayuki MIYAMA Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/04/01 Vol. E88-C No. 4 pp. 559-569 Type of Manuscript: Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP) Category: Digital Keyword: motion estimation, MPEG, H.264, block-matching,
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A Feed-Forward Dynamic Voltage Control Algorithm for Low Power MPEG4 on Multi-Regulated Voltage CPU Hideo OHIRA Kentaro KAWAKAMI Miwako KANAMORI Yasuhiro MORITA Masayuki MIYAMA Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/04/01 Vol. E87-C No. 4 pp. 457-465 Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies) Category: Keyword: MPEG4 encoder, low power, feed-forward voltage control, multi-regulated voltage CPU,
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VLSI-Oriented Motion Estimation Using a Steepest Descent Method in Mobile Video Coding Masayuki MIYAMA Junichi MIYAKOSHI Kousuke IMAMURA Hideo HASHIMOTO Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/04/01 Vol. E87-C No. 4 pp. 466-474 Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies) Category: Keyword: MPEG, motion estimation, gradient based method, steepest descent method, low power, VLSI,
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An Ultra Low Power Motion Estimation Processor for MPEG2 HDTV Resolution Video Masayuki MIYAMA Osamu TOOYAMA Naoki TAKAMATSU Tsuyoshi KODAKE Kazuo NAKAMURA Ai KATO Junichi MIYAKOSHI Kousuke IMAMURA Hideo HASHIMOTO Satoshi KOMATSU Mikio YAGI Masao MORIMOTO Kazuo TAKI Masahiko YOSHIMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/04/01 Vol. E86-C No. 4 pp. 561-569 Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies) Category: Architecture and Algorithms Keyword: HDTV, MPEG, motion estimation processor, Gradient Descent Search algorithm, SIMD datapath architecture,
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