Masayuki ARAI


Layout-Aware Fast Bridge/Open Test Generation by 2-Step Pattern Reordering
Masayuki ARAI Shingo INUYAMA Kazuhiko IWASAKI 
Publication:   
Publication Date: 2018/12/01
Vol. E101-A  No. 12  pp. 2262-2270
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
weighted fault coveragecritical areacritical area analysisbridge faultopen fault
 Summary | Full Text:PDF

A Low Capture Power Test Generation Method Based on Capture Safe Test Vector Manipulation
Toshinori HOSOKAWA Atsushi HIRAI Yukari YAMAUCHI Masayuki ARAI 
Publication:   
Publication Date: 2017/09/01
Vol. E100-D  No. 9  pp. 2118-2125
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
low powertest generationcapture safe test vectorstest vector synthesisunsafe faults
 Summary | Full Text:PDF

Reordering-Based Test Pattern Reduction Considering Critical Area-Aware Weighted Fault Coverage
Masayuki ARAI Kazuhiko IWASAKI 
Publication:   
Publication Date: 2017/07/01
Vol. E100-A  No. 7  pp. 1488-1495
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
weighted fault coveragecritical areatest cost reductiontest pattern reductionbridge faultopen fault
 Summary | Full Text:PDF

Checkpoint Time Arrangement Rotation in Hybrid State Saving with a Limited Number of Periodical Checkpoints
Ryo SUZUKI Mamoru OHARA Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/01/01
Vol. E96-D  No. 1  pp. 141-145
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
distributed checkpointinghybrid state savingcheckpoint-space reclamationtime arrangement rotation
 Summary | Full Text:PDF

Reduction of Area per Good Die for SoC Memory Built-In Self-Test
Masayuki ARAI Tatsuro ENDO Kazuhiko IWASAKI Michinobu NAKAO Iwao SUZUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2463-2471
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword: 
memory BISTBISRembedded SRAMarea per good dieiterative improvement algorithm
 Summary | Full Text:PDF

Reduction of Test Data Volume and Improvement of Diagnosability Using Hybrid Compression
Anis UZZAMAN Brion KELLER Brian FOUTZ Sandeep BHATIA Thomas BARTENSTEIN Masayuki ARAI Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/01/01
Vol. E93-D  No. 1  pp. 17-23
Type of Manuscript:  Special Section PAPER (Special Section on Test, Diagnosis and Verification of SOCs)
Category: 
Keyword: 
test compressionhybrid compressionvolume diagnosisATPGpartial good chip
 Summary | Full Text:PDF

Test Data Compression for Scan-Based BIST Aiming at 100x Compression Rate
Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI Tatsuru MATSUO Takahisa HIRAIDE Hideaki KONISHI Michiaki EMORI Takashi AIKYO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/03/01
Vol. E91-D  No. 3  pp. 726-735
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSIs)
Category: Test Compression
Keyword: 
test data compressiontest response compactionBIST-aided scan testX-valueATPG
 Summary | Full Text:PDF

Study on Expansion of Convolutional Compactors over Galois Field
Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/03/01
Vol. E91-D  No. 3  pp. 706-712
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSIs)
Category: Test Compression
Keyword: 
convolutional compactortest response compactionX-maskinggalois field
 Summary | Full Text:PDF

Study on Test Data Reduction Combining Illinois Scan and Bit Flipping
Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/03/01
Vol. E91-D  No. 3  pp. 720-725
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSIs)
Category: Test Compression
Keyword: 
test data reductionIllinois scanbit flippingBIST-aided scan test
 Summary | Full Text:PDF

Analytical Model on Hybrid State Saving with a Limited Number of Checkpoints and Bound Rollbacks
Mamoru OHARA Ryo SUZUKI Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/09/01
Vol. E89-A  No. 9  pp. 2386-2395
Type of Manuscript:  PAPER
Category: Reliability, Maintainability and Safety Analysis
Keyword: 
reliabilitydistributed systemshybrid state saving Time Warp simulationevaluation model
 Summary | Full Text:PDF

Reliability Analysis of a Convolutional-Code-Based Packet Level FEC under Limited Buffer Size
Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/04/01
Vol. E88-A  No. 4  pp. 1047-1054
Type of Manuscript:  PAPER
Category: Reliability, Maintainability and Safety Analysis
Keyword: 
reliability analysisevaluation modelconvolutional codepacket lossforward error correctionpacket buffer size
 Summary | Full Text:PDF

Application of Partially Rotational Scan Technique with Tester IP for Processor Circuits
Kenichi ICHINO Ko-ichi WATANABE Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/03/01
Vol. E87-D  No. 3  pp. 586-591
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSI)
Category: Scan Testing
Keyword: 
hybrid BISTn-detection testpartially rotational scanlow-speed tester
 Summary | Full Text:PDF

Seed Selection Procedure for LFSR-Based Random Pattern Generators
Kenichi ICHINO Ko-ichi WATANABE Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 3063-3071
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Timing Verification and Test Generation
Keyword: 
BISTLFSRtest-per-clocktest-per-scanseedpolynomial
 Summary | Full Text:PDF

A Technique for Constructing Dependable Internet Server Cluster
Mamoru OHARA Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/10/01
Vol. E86-D  No. 10  pp. 2198-2208
Type of Manuscript:  PAPER
Category: Fault Tolerance
Keyword: 
server clusteringdistributed algorithmIP multicastDNSdependability evaluation
 Summary | Full Text:PDF

High-Assurance Video Conference System over the Internet
Masayuki ARAI Hitoshi KUROSU Mamoru OHARA Ryo SUZUKI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2003/10/01
Vol. E86-B  No. 10  pp. 2940-2947
Type of Manuscript:  Special Section PAPER (IEICE/IEEE Joint Special Issue on Assurance Systems and Networks)
Category: Network Systems and Applications
Keyword: 
video conference systemconvolutional codesH.323Xcastpacket loss
 Summary | Full Text:PDF

Analytical Evaluation of Internet Packet Loss Recovery Using Convolutional Codes
Anna YAMAGUCHI Masayuki ARAI Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/05/01
Vol. E85-D  No. 5  pp. 854-863
Type of Manuscript:  PAPER
Category: Fault Tolerance
Keyword: 
fault toleranceInternet packet lossconvolutional codeloss recoverypost-reconstruction receiving rate
 Summary | Full Text:PDF

Fault-Tolerance Design for Multicast Using Convolutional-Code-Based FEC and Its Analytical Evaluation
Anna YAMAGUCHI Masayuki ARAI Hitoshi KUROSU Satoshi FUKUMOTO Kazuhiko IWASAKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/05/01
Vol. E85-D  No. 5  pp. 864-873
Type of Manuscript:  PAPER
Category: Fault Tolerance
Keyword: 
fault tolerancemulticastInternet packet losspunctured convolutional codesloss recovery
 Summary | Full Text:PDF

Batch Mode Algorithms of Classification by Feature Partitioning
Hiroyoshi WATANABE Masayuki ARAI Kenzo OKUDA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1998/01/25
Vol. E81-D  No. 1  pp. 144-147
Type of Manuscript:  LETTER
Category: Artificial Intelligence and Cognitive Science
Keyword: 
exemplar-based learningvotingfeature partitioning
 Summary | Full Text:PDF