Masato NAKAZATO


Design for Testability Method to Avoid Error Masking of Software-Based Self-Test for Processors
Masato NAKAZATO Michiko INOUE Satoshi OHTAKE Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/03/01
Vol. E91-D  No. 3  pp. 763-770
Type of Manuscript:  Special Section PAPER (Special Section on Test and Verification of VLSIs)
Category: High-Level Testing
Keyword: 
software-based self-testprocessortest program templatedesign for testabilityerror maskingat-speed testing
 Summary | Full Text:PDF(522.6KB)

Acceleration of Test Generation for Sequential Circuits Using Knowledge Obtained from Synthesis for Testability
Masato NAKAZATO Satoshi OHTAKE Kewal K. SALUJA Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/01/01
Vol. E90-D  No. 1  pp. 296-305
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
sequential circuittest generationsynthesis for testabilityfinite state machinetest knowledge
 Summary | Full Text:PDF(641.6KB)