Masao NAKAYA


FOREWORD
Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4  pp. 399-399
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
 Summary | Full Text:PDF

An Efficient Self-Timed Queue Architecture for ATM Switch LSIs
Harufusa KONDOH Hideaki YAMANAKA Masahiko ISHIWAKI Yoshio MATSUDA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/12/25
Vol. E77-C  No. 12  pp. 1865-1872
Type of Manuscript:  Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Multimedia System LSIs
Keyword: 
ATMATM switchLSIself-timed systems
 Summary | Full Text:PDF

Speculative Execution and Reducing Branch Penalty on a Superscalar Processor
Hideki ANDO Chikako NAKANISHI Hirohisa MACHIDA Tetsuya HARA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7  pp. 1080-1093
Type of Manuscript:  Special Section PAPER (Special Issue on New Architecture LSIs)
Category: Improved Binary Digital Architectures
Keyword: 
superscalarVLIWspeculative execution
 Summary | Full Text:PDF

A Shared Multibuffer Architecture for High-Speed ATM Switch LSIs
Harufusa KONDOH Hiromi NOTANI Hideaki YAMANAKA Keiichi HIGASHITANI Hirotaka SAITO Isamu HAYASHI Yoshio MATSUDA Kazuyoshi OSHIMA Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/07/25
Vol. E76-C  No. 7  pp. 1094-1101
Type of Manuscript:  Special Section PAPER (Special Issue on New Architecture LSIs)
Category: Improved Binary Digital Architectures
Keyword: 
B-ISDNATMswitchLSIBiCMOS
 Summary | Full Text:PDF

A Fully Integrated 6.25% Pull-in Range Digital PLL for ISDN Primary Rate Interface LSI
Harufusa KONDOH Seiji KOZAKI Shinya MAKINO Hiromi NOTANI Fuminobu HIDANI Masao NAKAYA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/03/25
Vol. E75-C  No. 3  pp. 280-287
Type of Manuscript:  Special Section PAPER (Special Issue on Analog LSI and Related Technology)
Category: 
Keyword: 
PLLpull-in rangeoscillatorISDNprimary rate interface
 Summary | Full Text:PDF

Influence of Non-Zero Resistance of Analog Ground Line in D/A Converter
Takahiro MIKI Yasuyuki NAKAMURA Masao NAKAYA Yasutaka HORIBA 
Publication:   IEICE TRANSACTIONS (1976-1990)
Publication Date: 1986/04/25
Vol. E69-E  No. 4  pp. 258-260
Type of Manuscript:  Special Section LETTER (Special Issue: Papers from 1986 National Convention IECE Japan)
Category: Silicon Devices and Integrated Circuits
Keyword: 
 Summary | Full Text:PDF