Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/08/01 Vol. E93-DNo. 8pp. 2080-2088 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Multiple-Valued VLSI Technology Keyword: multiple-valued logic, current-mode circuit, adaptive current control, many-core processor,
Parallel Evolutionary Graph Generation with Terminal-Color Constraint and Its Application to Current-Mode Logic Circuit Design Masanori NATSUITakafumi AOKITatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/09/01 Vol. E85-ANo. 9pp. 2061-2071 Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and Its Applications) Category: Keyword: multiple-valued logic, arithmetic circuit, evolutionary computation, genetic algorithm (GA),
Evolutionary Graph Generation System with Terminal-Color Constraint--An Application to Multiple-Valued Logic Circuit Synthesis-- Masanori NATSUITakafumi AOKITatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-ANo. 11pp. 2808-2810 Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms) Category: Analog Synthesis Keyword: multiple-valued logic, arithmetic circuits, evolutionary computation, genetic algorithm,