IEICE Trans

Masanori FURUTA

A Replica-Amp Gain Enhancement Technique for an Operational Amplifier with Low Mismatch Sensitivity and High Voltage Swing Junya MATSUNO Masanori FURUTA Tetsuro ITAKURA Tatsuji MATSUURA Akira HYOGO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/02/01 Vol. E99-A No. 2 pp. 547-554 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: opamp, gain enhancement, replica amplifier,
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A Wide Bandwidth Analog Baseband Circuit for 60-GHz Proximity Wireless Communication Receiver in 65-nm CMOS Masanori FURUTA Hidenori OKUNI Masahiro HOSOYA Akihide SAI Junya MATSUNO Shigehito SAIGUSA Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2015/02/01 Vol. E98-A No. 2 pp. 492-499 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: time-interleaved, SAR, ADC, dynamic, T/H circuit, high-speed, low-power,
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A 36-mW 1.5-GS/s 7-Bit Time-Interleaved SAR ADC Using Source Follower Based Track-and-Hold Circuit in 65-nm CMOS Masanori FURUTA Ippei AKITA Junya MATSUNO Tetsuro ITAKURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/07/01 Vol. E96-A No. 7 pp. 1552-1561 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: time-interleaved, SAR, ADC, dynamic, T/H circuit, high-speed, low-power,
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Simultaneous Compensation of RC Mismatch and Clock Skew in Time-Interleaved S/H Circuits Zheng LIU Masanori FURUTA Shoji KAWAHITO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/06/01 Vol. E89-C No. 6 pp. 710-716 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies) Category: Keyword: RC mismatch, clock skew, time-interleaved ADCs, compensation, sampling clock phase calibration,
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Low-Power Design of High-Speed A/D Converters Shoji KAWAHITO Kazutaka HONDA Masanori FURUTA Nobuhiro KAWAI Daisuke MIYAZAKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/04/01 Vol. E88-C No. 4 pp. 468-478 Type of Manuscript: INVITED PAPER (Special Section on Low-Power LSI and Low-Power IP) Category: Keyword: pipeline ADC, parallel-pipeline ADC, low-power design, power optimization,
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A Digital Calibration Technique of Capacitor Mismatch for Pipelined Analog-to-Digital Converters Masanori FURUTA Shoji KAWAHITO Daisuke MIYAZAKI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/08/01 Vol. E85-C No. 8 pp. 1562-1568 Type of Manuscript: Special Section PAPER (Special Issue on High-Performance Analog Integrated Circuits) Category: Keyword: pipelined ADC, parallel pipelined ADC, digital calibration, error measurement,
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