Masamoto TAGO


A 3-D Packaging Technology with Highly-Parallel Memory/Logic Interconnect
Yoichiro KURITA Koji SOEJIMA Katsumi KIKUCHI Masatake TAKAHASHI Masamoto TAGO Masahiro KOIKE Koujirou SHIBUYA Shintaro YAMAMICHI Masaya KAWANO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/12/01
Vol. E92-C  No. 12  pp. 1512-1522
Type of Manuscript:  PAPER
Category: Electronic Components
Keyword: 
three-dimensional packageinter-chip connectionswide-band communicationfine interposerbumpinterconnection
 Summary | Full Text:PDF

Daisy Chain Transmitter for Power Reduction in Inductive-Coupling CMOS Link
Kiichi NIITSU Noriyuki MIURA Mari INOUE Yoshihiro NAKAGAWA Masamoto TAGO Masayuki MIZUNO Takayasu SAKURAI Tadahiro KURODA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 829-835
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Analog and Communications
Keyword: 
low powerdaisy chaininductive couplingwide bandwidth
 Summary | Full Text:PDF