IEICE SEARCH SYSTEM

Masahiro NUMA

A Sub-1-µs Start-Up Time, Fully-Integrated 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems Hiroki ASANO Tetsuya HIROSE Taro MIYOSHI Keishi TSUBAKI Toshihiro OZAKI Nobutaka KUROKI Masahiro NUMA
Publication: Publication Date: 2018/03/01 Vol. E101-C No. 3 pp. 161-169 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: relaxation oscillator, fast start-up, digital signal processing, high accuracy, intermittent operation, PVT variations,
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Multi-Channel Convolutional Neural Networks for Image Super-Resolution Shinya OHTANI Yu KATO Nobutaka KUROKI Tetsuya HIROSE Masahiro NUMA
Publication: Publication Date: 2017/02/01 Vol. E100-A No. 2 pp. 572-580 Type of Manuscript: Special Section PAPER (Special Section on Image Media Quality) Category: IMAGE PROCESSING Keyword: super-resolution, resolution enhancement, convolutional neural networks, CNN, deep learning,
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A Highly Efficient Switched-Capacitor Voltage Boost Converter with Nano-Watt MPPT Controller for Low-Voltage Energy Harvesting Toshihiro OZAKI Tetsuya HIROSE Takahiro NAGAI Keishi TSUBAKI Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/12/01 Vol. E99-A No. 12 pp. 2491-2499 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: energy harvesting, DC-DC converter, charge pump, MPPT, low-power,
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An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs Yuzuru SHIZUKU Tetsuya HIROSE Nobutaka KUROKI Masahiro NUMA Mitsuji OKADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2015/12/01 Vol. E98-A No. 12 pp. 2600-2606 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Circuit Design Keyword: D flip-flop, low-power, low-voltage, energy-efficient, compact,
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A 32-kHz Real-Time Clock Oscillator with On-Chip PVT Variation Compensation Circuit for Ultra-Low Power MCUs Keishi TSUBAKI Tetsuya HIROSE Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2015/05/01 Vol. E98-C No. 5 pp. 446-453 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: ROSC, RTC, oscillator, comparator, PVT variation, low-power,
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A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit Keishi TSUBAKI Tetsuya HIROSE Yuji OSAKI Seiichiro SHIGA Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2014/06/01 Vol. E97-C No. 6 pp. 512-518 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: ROSC, RTC, oscillator, comparator, PVT variation, low-power,
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FOREWORD Masahiro NUMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/12/01 Vol. E95-A No. 12 pp. 2171-2171 Type of Manuscript: FOREWORD Category: Keyword:
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Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit Kei MATSUMOTO Tetsuya HIROSE Yuji OSAKI Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/06/01 Vol. E94-C No. 6 pp. 1042-1048 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: SRAM, threshold voltage variation, compensation circuit, process variation, temperature variation, PVT variation,
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Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique Yuji OSAKI Tetsuya HIROSE Kei MATSUMOTO Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/01/01 Vol. E94-C No. 1 pp. 80-88 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: subthreshold operation, digital circuits, PVT variation, delay compensation,
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An Error Diagnosis Technique Based on Clustering of Elements Kosuke SHIOKI Narumi OKADA Kosuke WATANABE Tetsuya HIROSE Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 pp. 2490-2496 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verification Keyword: ECO, error diagnosis, incremental synthesis, LUT,
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An Error Diagnosis Technique Based on Location Sets to Rectify Subcircuits Kosuke SHIOKI Narumi OKADA Toshiro ISHIHARA Tetsuya HIROSE Nobutaka KUROKI Masahiro NUMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-A No. 12 pp. 3136-3142 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verfication Keyword: ECO, error diagnosis, incremental synthesis, LUT,
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Look-Ahead Dynamic Threshold Voltage Control Scheme for Improving Write Margin of SOI-7T-SRAM Masaaki IIJIMA Kayoko SETO Masahiro NUMA Akira TADA Takashi IPPOSHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/12/01 Vol. E90-A No. 12 pp. 2691-2694 Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms) Category: Memory Design and Test Keyword: PD-SOI, body-bias, SRAM, low power design,
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Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation Masaaki IIJIMA Masayuki KITAMURA Masahiro NUMA Akira TADA Takashi IPPOSHI Shigeto MAEGAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2007/04/01 Vol. E90-C No. 4 pp. 666-674 Type of Manuscript: Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies) Category: Digital Keyword: low power design, PD-SOI, body-bias, pass-transistor logic, circuit simulation, SRAM,
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An Evaluation of Triple Density Error Diffusion for Medical Monochrome LCDs Nobutaka KUROKI Nobuhiro OKA Masahiro NUMA Keisuke YAMAMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/06/01 Vol. E89-A No. 6 pp. 1866-1868 Type of Manuscript: LETTER Category: Image Keyword: error diffusion, medical LCD, sub-pixel modulation, eye-model,
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A Novel Layout Approach Using Dual Supply Voltage Technique on Body-Tied PD-SOI Kazuki FUKUOKA Masaaki IIJIMA Kenji HAMADA Masahiro NUMA Akira TADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/12/01 Vol. E87-A No. 12 pp. 3244-3250 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Floorplan Keyword: dual supply voltages, low power, body-tied PD-SOI,
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Application of Error Diagnosis Technique to Incremental Synthesis Hiroshi INOUE Takahiro IWASAKI Toshifumi SUGANE Masahiro NUMA Keisuke YAMAMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-A No. 12 pp. 3214-3217 Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms) Category: Design Methodology Keyword: ECO, incremental synthesis, error diagnosis, design error,
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