Masahide INUISHI

Partially Depleted SOI Technology with Body-Tied Hybrid Trench Isolation for High-Speed System-On-a-Chip Application
Yasuo YAMAGUCHI Takashi IPPOSHI Kimio UEDA Koichiro MASHIKO Shigeto MAEGAWA Masahide INUISHI Tadashi NISHIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/12/01
Vol. E84-C  No. 12  pp. 1735-1745
Type of Manuscript:  Special Section PAPER (Special Issue on Integrated Systems with New Concepts)
Category: 
Keyword: 
SOI, SOC, partially depleted, isolation, 
 Summary | Full Text:PDF(1.8MB)
Deep Submicron Field Isolation with Buried Insulator between Polysilicon Electrodes (BIPS)
Masahiro SHIMIZU Masahide INUISHI Katsuhiro TSUKAMOTO Hideaki ARIMA Hirokazu MIYOSHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8  pp. 1369-1376
Type of Manuscript:  Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: General Technology
Keyword: 
isolation, parasitic field transistor, MOSFET, 
 Summary | Full Text:PDF(933.5KB)
A Novel CMOS Structure with Polysilicon Source/Drain (PSD) Transistors by Self-Aligned Silicidation
Masahiro SHIMIZU Takehisa YAMAGUCHI Masahide INUISHI Katsuhiro TSUKAMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/25
Vol. E76-C  No. 4  pp. 532-540
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Category: Device Technology
Keyword: 
MOS transistor, shallow junction, salicide, titanium, 
 Summary | Full Text:PDF(803.6KB)