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| Kyeong-Yuk MIN
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A Performance Optimized Architecture of Deblocking Filter in H.264/AVC
Kyeong-Yuk MIN Jong-Wha CHONG | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A
No. 4
pp. 1038-1043
Type of Manuscript:
Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa)
Category:
Keyword:
deblocking filter, hardware architecture, H.264, | | | Summary | Full Text:PDF | |
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A Design of Real-Time JPEG Encoder for 1.4 Mega Pixel CMOS Image Sensor SoC
Kyeong-Yuk MIN Jong-Wha CHONG | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/06/01
Vol. E88-A
No. 6
pp. 1443-1447
Type of Manuscript:
Special Section PAPER (Special Section on Papers Selected from 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004))
Category:
Keyword:
CMOS image sensor, encoder, JPEG, one-chip camera, SoC, | | | Summary | Full Text:PDF | |
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