Koji HIROSE


A Consideration of Threshold Voltage Mismatch Effects and a Calibration Technique for Current Mirror Circuits
Tohru KANEKO Koji HIROSE Akira MATSUZAWA 
Publication:   
Publication Date: 2018/04/01
Vol. E101-C  No. 4  pp. 224-232
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
current mirrorCMOScalibrationbody bias control
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