IEICE Trans

Koichi TANNO

High-PSRR, Low-Voltage CMOS Current Mode Reference Circuit Using Self-Regulator with Adaptive Biasing Technique Kenya KONDO Hiroki TAMURA Koichi TANNO
Publication: Publication Date: 2020/02/01 Vol. E103-A No. 2 pp. 486-491 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: voltage reference, bandgap reference, current mode, low voltage, subthreshold, self-regulator,
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Low Voltage CMOS Current Mode Reference Circuit without Operational Amplifiers Kenya KONDO Koichi TANNO Hiroki TAMURA Shigetoshi NAKATAKE
Publication: Publication Date: 2018/05/01 Vol. E101-A No. 5 pp. 748-754 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: voltage reference, bandgap reference, current mode, OPAMP less, low voltage, low power, subthreshold,
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Subblock-Level Matching Layout for Analog Block-Pair and Its Layout-Dependent Manufacturability Evaluation Takuya HIRATA Ryuta NISHINO Shigetoshi NAKATAKE Masaya SHIMOYAMA Masashi MIYAGAWA Ryoichi MIYAUCHI Koichi TANNO Akihiro YAMADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2016/07/01 Vol. E99-A No. 7 pp. 1381-1389 Type of Manuscript: Special Section PAPER (Special Section on Design Methodologies for System on a Chip) Category: Keyword: instrumentation amplifier, layout-dependent manufacturability, analog layout, matching layout,
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A Study on Gaze Estimation System of the Horizontal Angle Using Electrooculogram Signals Mingmin YAN Hiroki TAMURA Koichi TANNO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2014/09/01 Vol. E97-D No. 9 pp. 2330-2337 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Circuit Implementations Keyword: electrooculogram signal, gaze estimation, mathematical model, drift,
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A Low-Power and High-Linear Current to Time Converter for Wireless Sensor Networks Ryota SAKAMOTO Koichi TANNO Hiroki TAMURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/06/01 Vol. E95-A No. 6 pp. 1088-1090 Type of Manuscript: LETTER Category: Circuit Theory Keyword: current to time converter, temperature sensor, analog to digital converter, CMOS analog circuit,
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Optimization and Verification of Current-Mode Multiple-Valued Digit ORNS Arithmetic Circuits Motoi INABA Koichi TANNO Hiroki TAMURA Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/08/01 Vol. E93-D No. 8 pp. 2073-2079 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Multiple-Valued VLSI Technology Keyword: multiple-valued logic, overlap resolution number system, current-mode circuit, weak-inversion region,
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Design of CMOS OTAs for Low-Voltage and Low-Power Application Hisashi TANAKA Koichi TANNO Hiroki TAMURA Kenji MURAO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/11/01 Vol. E91-A No. 11 pp. 3385-3388 Type of Manuscript: LETTER Category: Analog Signal Processing Keyword: weak inversion region, OTA, low-voltage, low-power, high-linearity,
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Midpoint-Validation Method for Support Vector Machine Classification Hiroki TAMURA Koichi TANNO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2008/07/01 Vol. E91-D No. 7 pp. 2095-2098 Type of Manuscript: LETTER Category: Biocybernetics, Neurocomputing Keyword: support vector machine, midpoint-validation, pattern classification problem,
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Linear and Compact Floating Node Voltage-Controlled Variable Resistor Circuit Muneo KUSHIMA Motoi INABA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/02/01 Vol. E89-A No. 2 pp. 459-460 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog integrated circuits, floating node, voltage-controlled variable resistor circuit,
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Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit Koichi TANNO Kiminobu SATO Hisashi TANAKA Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/10/01 Vol. E88-A No. 10 pp. 2696-2698 Type of Manuscript: Special Section LETTER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: sample hold circuit, low-voltage circuits, boost circuits, MOS analog integrated circuits, analog circuits,
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Combiner-Based MOS OTAs Koichi TANNO Kenya KONDO Okihiko ISHIZUKA Takako TOYAMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/06/01 Vol. E88-A No. 6 pp. 1622-1625 Type of Manuscript: LETTER Category: Analog Signal Processing Keyword: OTA, operational transconductance amplifier, combiner, CMOS analog integrated circuits,
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Wide-Input Range Variable Resistor Circuit Using an FG-MOSFET Muneo KUSHIMA Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-A No. 12 pp. 3294-3296 Type of Manuscript: LETTER Category: Analog Signal Processing Keyword: analog integrated circuits, floating-gate MOSFET (FG-MOSFET), variable resistor circuit, wide-input range,
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Wide Input-Range Four-Quadrant Analog Multiplier Using Floating-Gate MOSFET's Dasong ZHU Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/07/01 Vol. E86-A No. 7 pp. 1759-1765 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: analog multiplier, wide input-range, FG-MOSFET,
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Low-Power and Wide-Input Range Voltage Controlled Linear Variable Resistor Using an FG-MOSFET and Its Application Muneo KUSHIMA Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/02/01 Vol. E86-A No. 2 pp. 342-349 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog integrated circuits, floating-gate MOSFET (FG-MOSFET), voltage-controlled linear variable resistor (VCLVR), low-power and wide-input range,
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A High-Speed Binary to Residue Converter Using a Signed-Digit Number Representation Makoto SYUTO Eriko SATAKE Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2002/05/01 Vol. E85-D No. 5 pp. 903-905 Type of Manuscript: LETTER Category: VLSI Systems Keyword: residue number system, signed-digit number representation, binary to residue converter, carry-free addition,
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Analog Inverter with Neuron-MOS Transistors and Its Application Motoi INABA Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/02/01 Vol. E85-A No. 2 pp. 360-365 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog inverter, down literal circuit, NOT function, MAX function, MIN function,
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A Multiple-Valued Immune Network and Its Applications Zheng TANG Takayuki YAMAGUCHI Koichi TASHIMA Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/06/25 Vol. E82-A No. 6 pp. 1102-1108 Type of Manuscript: PAPER Category: Neural Networks Keyword: multiple-valued, immune network, immune response, pattern recognition,
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Neuron-MOS Current Mirror Circuit and Its Application to Multi-Valued Logic Jing SHEN Koichi TANNO Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1999/05/25 Vol. E82-D No. 5 pp. 940-948 Type of Manuscript: Special Section PAPER (Special Issue on Multiple-Valued Logic and Its Applications) Category: Circuits Keyword: neuron MOS transistor, multi-valued logic, current-mode circuit, current mirror, current comparator, threshold detector, T-gate, integrated circuit,
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A 1-V, 1-V_p-p Input Range, Four-Quadrant Analog Multiplier Using Neuron-MOS Transistors Koichi TANNO Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/05/25 Vol. E82-C No. 5 pp. 750-757 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: multiplier, low voltage, low power, neuron MOS transistor, analog integrated circuit,
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Ultra-Low Power Two-MOS Virtual-Short Circuit and Its Application Koichi TANNO Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/10/25 Vol. E81-A No. 10 pp. 2194-2200 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: virtual-short, weak-inversion region, low power, low voltage, CMOS analog circuit, integrated circuit,
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Neuron-MOSV_T Cancellation Circuit and Its Application to a Low-Power and High-Swing Cascode Current Mirror Koichi TANNO Jing SHEN Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/01/25 Vol. E81-A No. 1 pp. 110-116 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: neuron-MOS transistor, threshold voltage, CMOS analog circuit, circuit theory and design, integrated circuit,
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1: n² MOS Cascode Circuits and Their Applications Koichi TANNO Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/12/25 Vol. E79-A No. 12 pp. 2159-2165 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: MOS analog circuit, MOS LSI, circuit theory and design, integrated circuit, threshold voltage,
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Design and Implementation of a Calibrating T-Model Neural-Based A/D Converter Zheng TANG Yuichi SHIRATA Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/04/25 Vol. E79-A No. 4 pp. 553-559 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: neural networks, Hopfield model, calibrating, A/D converter,
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Hopfield Neural Network Learning Using Direct Gradient Descent of Energy Function Zheng TANG Koichi TASHIMA Hirofumi HEBISHIMA Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/02/25 Vol. E79-A No. 2 pp. 258-261 Type of Manuscript: LETTER Category: Neural Networks Keyword: neural networks, gradient descent learning, Hopfield model, analog-to-digital conversion, associative memory,
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Implementation of T-Model Neural-Based PCM Encoders Using MOS Charge-Mode Circuits Zheng TANG Hirofumi HEBISHIMA Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/10/25 Vol. E78-A No. 10 pp. 1345-1349 Type of Manuscript: Special Section LETTER (Special Section on Nonlinear Theory and Its Applications) Category: Keyword: neural network, T-Model, PCM encoder network, Hopfield model, MOS charge-mode circuits,
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Design of a Novel MOS V_T Extractor Circuit Koichi TANNO Okihiko ISHIZUKA Zhen TANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/09/25 Vol. E78-C No. 9 pp. 1306-1310 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: MOS analog circuit, threshold voltage, MOS LSI, circuit theory and design, integrated circuit,
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A Learning Fuzzy Network and Its Applications to Inverted Pendulum System Zheng TANG Yasuyoshi KOBAYASHI Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/06/25 Vol. E78-A No. 6 pp. 701-707 Type of Manuscript: PAPER Category: Systems and Control Keyword: fuzzy network, learning, fuzzy controller, back propagation,
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