Koichi FUKUDA


Wavelet Coding of Structured Geometry Data on Triangular Lattice Plane Considering Rate-Distortion Properties
Hiroyuki KANEKO Koichi FUKUDA Akira KAWANAKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2004/05/01
Vol. E87-D  No. 5  pp. 1238-1246
Type of Manuscript:  PAPER
Category: Image Processing and Video Processing
Keyword: 
geometry compression2-D structuringwavelet codingoptimizationVRML
 Summary | Full Text:PDF(825.7KB)

A New Non-Pair Diffusion Based Dopant Pile-up Model for Process Designers and Its Prediction Accuracy
Hirokazu HAYASHI Noriyuki MIURA Hirotaka KOMATSUBARA Marie MOCHIZUKI Koichi FUKUDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/03/01
Vol. E86-C  No. 3  pp. 453-458
Type of Manuscript:  Special Section PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02))
Category: 
Keyword: 
RSCEsimple modeldopant pile-upthreshold voltage
 Summary | Full Text:PDF(1.5MB)

TCAD Driven Drain Engineering for Hot Carrier Reduction of 3.3 V I/O PMOSFET
Noriyuki MIURA Hirotaka KOMATSUBARA Marie MOCHIZUKI Hirokazu HAYASHI Koichi FUKUDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/03/01
Vol. E86-C  No. 3  pp. 447-452
Type of Manuscript:  Special Section PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02))
Category: 
Keyword: 
hot carrier degradationI/O transistordrain avalanche hot carrierchannel hot holephoto-mask reduction
 Summary | Full Text:PDF(1.2MB)

A Simplified Dopant Pile-Up Model for Process Simulators
Hirokazu HAYASHI Noriyuki MIURA Hirotaka KOMATSUBARA Marie MOCHIZUKI Koichi FUKUDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/12/01
Vol. E85-C  No. 12  pp. 2117-2122
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
RSCEsimple modeldopant pile-upthreshold voltage
 Summary | Full Text:PDF(1.1MB)

A Simplified Process Modeling for Reverse Short Channel Effect of Threshold Voltage of MOSFET
Hirokazu HAYASHI Noriyuki MIURA Hirotaka KOMATSUBARA Koichi FUKUDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/09/01
Vol. E84-C  No. 9  pp. 1234-1239
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
RSCEsimple modeldopant pile-upthreshold voltage
 Summary | Full Text:PDF(756.1KB)

Systematic Yield Simulation Methodology Applied to Fully-Depleted SOI MOSFET Process
Noriyuki MIURA Hirokazu HAYASHI Koichi FUKUDA Kenji NISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/08/25
Vol. E83-C  No. 8  pp. 1288-1294
Type of Manuscript:  Special Section PAPER (Special Issue on 1999 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'99))
Category: Simulation Methodology and Environment
Keyword: 
fully-depleted SOIfloating-body effectparasitic channel leakagesystematic yieldprocess optimization
 Summary | Full Text:PDF(1.1MB)

Inverse Modeling and Its Application to MOSFET Channel Profile Extraction
Hirokazu HAYASHI Hideaki MATSUHASHI Koichi FUKUDA Kenji NISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/06/25
Vol. E82-C  No. 6  pp. 862-869
Type of Manuscript:  INVITED PAPER (Special Issue on TCAD for Semiconductor Industries)
Category: 
Keyword: 
inverse modelingdoping profile extractionMOSFETthreshold voltage
 Summary | Full Text:PDF(949.5KB)

Improvement of PECVD-SiNx for TFT Gate Insulator by Controlling Ion Bombardment Energy
Yasuhiko KASAMA Tadahiro OHMI Koichi FUKUDA Hirobumi FUKUI Chisato IWASAKI Shoichi ONO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/03/25
Vol. E79-C  No. 3  pp. 398-406
Type of Manuscript:  Special Section PAPER (Special Issue on Scientific ULSI Manufacturing Technology)
Category: Device Issues
Keyword: 
TFTgate insulatorPECVDion fluxion energy
 Summary | Full Text:PDF(1MB)

A New Wide Applicable Mobility Model for Device Simulation Taking Physics-Based Carrier Screening Effects into Account
Koichi FUKUDA Kenji NISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/03/25
Vol. E78-C  No. 3  pp. 281-287
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies)
Category: 
Keyword: 
device simulationmobilitycarrier screeningimpurity scatteringMOSFET
 Summary | Full Text:PDF(509.7KB)