Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/12/01 Vol. E89-ANo. 12pp. 3642-3651 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Architecture Keyword: H.264/AVC, DVS (dynamic voltage scaling), elastic pipeline, low power, divided entropy decoder,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/12/01 Vol. E89-ANo. 12pp. 3634-3641 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Architecture Keyword: SRAM, DVS, Vth-variation-tolerant, low power,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/12/01 Vol. E88-ANo. 12pp. 3290-3297 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Low Power Methodology Keyword: low power, dynamic voltage frequency scaling (DVFS), adaptive body biasing, Vdd-hopping, Vth-hopping,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/04/01 Vol. E87-CNo. 4pp. 457-465 Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies) Category: Keyword: MPEG4 encoder, low power, feed-forward voltage control, multi-regulated voltage CPU,
