Kennosuke FUKAMI

200-ps Interchip-Delay Field-Programmable MCM for Telecommunications
Masaru KATAYAMA Takahiro MUROOKA Toshiaki MIYAZAKI Kazuhiro SHIRAKAWA Kazuhiro HAYASHI Takaki ICHIMORI Kennosuke FUKAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/12/25
Vol. E81-A  No. 12  pp. 2673-2678
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
FPGA, MCM, Interchip delay, 
 Summary | Full Text:PDF
Low Power Management Method for PDS ONU Logic LSIs
Koichi SAITO Kiyoshi MATSUMOTO Kennosuke FUKAMI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/03/25
Vol. E81-B  No. 3  pp. 604-608
Type of Manuscript:  PAPER
Category: Communication Device and Circuit
Keyword: 
LSI, logic LSI, low power, PDS, ONU, 
 Summary | Full Text:PDF
Delay Calculation Method for SRAM-based FPGAs
Masaru KATAYAMA Atsushi TAKAHARA Toshiaki MIYAZAKI Kennosuke FUKAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10  pp. 1789-1794
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
FPGA, propagation delay, CAD, 
 Summary | Full Text:PDF
A Co-Evaluation of the Architectures and the CAD System for Speed-Oriented FPGAs
Tsunemasa HAYASHI Atsushi TAKAHARA Kennosuke FUKAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10  pp. 1842-1852
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
FPGA, telecommunications, multiplexor-type logic cell, BDD-based technology mapping, clustered wiring structure, 
 Summary | Full Text:PDF