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Kenji TANIGUCHI

A High Dynamic Range and Low Power Consumption Audio Delta-Sigma Modulator with Opamp Sharing Technique among Three Integrators Daisuke KANEMOTO Toru IDO Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/08/01 Vol. E95-C No. 8 pp. 1427-1433 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: opamp sharing technique, switched capacitor integrator, delta-sigma analog-to-digital converter, audio application,
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A Wide Dynamic Range Variable Gain Amplifier with Enhanced IP1 dB and Temperature Compensation Hisayasu SATO Takaya MARUYAMA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/08/01 Vol. E94-C No. 8 pp. 1311-1319 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: VGA, 1 dB compression point, noise figure, wireless, transceiver, IIP3,
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A Multi-Stage Second Order Dynamic Element Matching with In-Band Mismatch Noise Reduction Enhancement Yu TAMURA Toru IDO Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/08/01 Vol. E94-C No. 8 pp. 1340-1343 Type of Manuscript: BRIEF PAPER Category: Electronic Circuits Keyword: dynamic element matching, delta-sigma digital-to-analog converter,
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An Area-Efficient, Low-Power CMOS Fractional Bandgap Reference Indika U. K. BOGODA APPUHAMYLAGE Shunsuke OKURA Toru IDO Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/06/01 Vol. E94-C No. 6 pp. 960-967 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies) Category: Keyword: bandgap reference (BGR), area-efficient, low-power, temperature coefficient, CMOS,
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A Dynamic Dither Gain Control Technique for Multi-Level Delta-Sigma DACs with Multi-Stage Second Order Dynamic Element Matching Yu TAMURA Toru IDO Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2011/03/01 Vol. E94-C No. 3 pp. 346-352 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: dynamic element matching, dither control, delta-sigma digital-to-analog converter,
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A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier Takao KIHARA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2010/02/01 Vol. E93-C No. 2 pp. 187-199 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: CMOS, low-noise amplifier (LNA), noise cancellation, ultra-wideband (UWB), transformer,
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Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation Toshimasa MATSUOKA Jun WANG Takao KIHARA Hyunju HAM Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/02/01 Vol. E93-A No. 2 pp. 356-366 Type of Manuscript: INVITED PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog, RF, CMOS, forward body biasing, transformer, stochastic resonance,
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A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier Takao KIHARA Hae-Ju PARK Isao TAKOBE Fumiaki YAMASHITA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2009/04/01 Vol. E92-C No. 4 pp. 564-575 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: CMOS, low-noise amplifier (LNA), low voltage, transformer,
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Application of Noise-Enhanced Detection of Subthreshold Signals for Communication Systems Hyunju HAM Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/04/01 Vol. E92-A No. 4 pp. 1012-1018 Type of Manuscript: Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa) Category: Keyword: noise, stochastic resonance, statistical processing, communications system,
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A Reference Voltage Buffer with Settling Boost Technique for a 12 bit 18 MHz Multibit/Stage Pipelined A/D Converter Shunsuke OKURA Tetsuro OKURA Toru IDO Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/02/01 Vol. E92-A No. 2 pp. 367-373 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: CMOS, pipelined ADC, settling, boost, low power,
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Design of a 0.5 V Op-Amp Based on CMOS Inverter Using Floating Voltage Sources Jun WANG Tuck-Yang LEE Dong-Gyou KIM Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/08/01 Vol. E91-C No. 8 pp. 1375-1378 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: operational amplifier, CMOS inverter, floating voltage source, forward body bias,
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A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC Shunsuke OKURA Tetsuro OKURA Bogoda A. INDIKA U.K. Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/02/01 Vol. E90-A No. 2 pp. 358-364 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: CMOS, imager, column-parallel ADC, RAM bank, DFF, latch, buffer, energy efficient,
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Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier Takao KIHARA Guechol KIM Masaru GOTO Keiji NAKAMURA Yoshiyuki SHIMIZU Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/02/01 Vol. E90-A No. 2 pp. 317-325 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: low-noise amplifier (LNA), FD-SOI CMOS, noise, linearity, low-voltage,
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Accurate Small-Signal Modeling of FD-SOI MOSFETs Guechol KIM Yoshiyuki SHIMIZU Bunsei MURAKAMI Masaru GOTO Keisuke UEDA Takao KIHARA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/04/01 Vol. E89-C No. 4 pp. 517-519 Type of Manuscript: Special Section LETTER (Special Section on Advanced RF Technologies for Compact Wireless Equipment and Mobile Phones) Category: Keyword: FD-SOI, MOSFET, RF, modeling, non-quasi-static,
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Wired CDMA Interface with Adaptivity for Interconnect Capacitances Tsukasa IDA Shinsaku SHIMIZU Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/10/01 Vol. E88-A No. 10 pp. 2702-2706 Type of Manuscript: Special Section LETTER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: CMOS analog circuit, variable gain amplifier, CDMA,
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Ultralow-Power Current Reference Circuit with Low Temperature Dependence Tetsuya HIROSE Toshimasa MATSUOKA Kenji TANIGUCHI Tetsuya ASAI Yoshihito AMEMIYA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/06/01 Vol. E88-C No. 6 pp. 1142-1147 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies) Category: Building Block Keyword: CMOS, reference, subthreshold, weak inversion, low power, temperature dependence,
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CMOS Front-End Circuits of Dual-Band GPS Receiver Yoshihiro UTSUROGI Masaki HARUOKA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/06/01 Vol. E88-C No. 6 pp. 1275-1279 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies) Category: RF Keyword: dual-band GPS receiver, L1/L2, LNA, image-reject mixer, image-rejection ratio (IMRR),
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A New Inductance Extraction Technique of On-Wafer Spiral Inductor Based on Analytical Interconnect Formula Hideki SHIMA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/05/01 Vol. E88-C No. 5 pp. 824-828 Type of Manuscript: Special Section PAPER (Special Section on Microelectronic Test Structures) Category: Keyword: spiral inductors, interconnect, closed-form expression, inductance extraction, analytical technique,
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A CMOS IF Variable Gain Amplifier with Exponential Gain Control Sungwoo CHA Tetsuya HIROSE Masaki HARUOKA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/02/01 Vol. E88-A No. 2 pp. 410-415 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: variable gain amplifier, VGA, linearized transconductance, linear-in-dB characteristics, exponential gain control, CMOS,
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High Speed and Noise Tolerant Parallel Bus Interface for VLSI Systems Using Multi Bit Code Division Multiple Access Shinsaku SHIMIZU Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/11/01 Vol. E87-C No. 11 pp. 1923-1927 Type of Manuscript: Special Section PAPER (Special Section on New System Paradigms for Integrated Electronics) Category: Keyword: parallel-CDMA interface, noise tolerance, multi-bit transmission,
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Watch-Dog Circuit for Quality Guarantee with Subthreshold MOSFET Current Tetsuya HIROSE Ryuji YOSHIMURA Toru IDO Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/11/01 Vol. E87-C No. 11 pp. 1910-1914 Type of Manuscript: Special Section PAPER (Special Section on New System Paradigms for Integrated Electronics) Category: Keyword: CMOS, subthreshold current, ultra-low-power, temperature dependence,
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CMOS Demodulator for Short-Range Wireless Interconnection Using ASK/CDMA Technique Hideyuki FURUYA Sungwoo CHA Yoshiyuki SHIMIZU Masaki HARUOKA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/10/01 Vol. E87-A No. 10 pp. 2719-2721 Type of Manuscript: Special Section LETTER (Special Section on Wide Band Systems) Category: Keyword: CMOS, CDMA, ASK, wireless interconnect,
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Threshold Voltage Mismatch of FD-SOI MOSFETs Yoshiyuki SHIMIZU Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2004/06/01 Vol. E87-C No. 6 pp. 1013-1014 Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies) Category: Keyword: threshold voltage, FD-SOI, floating body effect, DIBL,
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A New Analog Correlator Circuit for DS-CDMA Wireless Applications Mostafa A. R. ELTOKHY Boon-Keat TAN Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/05/01 Vol. E86-A No. 5 pp. 1294-1301 Type of Manuscript: PAPER Category: Spread Spectrum Technologies and Applications Keyword: code division multiple access, analog correlator, demodulation process, switched-capacitor circuits, spread spectrum,
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Ensemble Monte Carlo/Molecular Dynamics Simulation of Inversion Layer Mobility in Si MOSFETs--Effects of Substrate Impurity Yoshinari KAMAKURA Hironori RYOUKE Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/03/01 Vol. E86-C No. 3 pp. 357-362 Type of Manuscript: Special Section PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02)) Category: Keyword: Monte Carlo simulation, molecular dynamics, mobility, screening, MOSFET,
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A Low-Voltage SOI-CMOS LC-Tank VCO with Double-Tuning Technique Using Lateral P-N Junction Variable Capacitance Mitsuo NAKAMURA Hideki SHIMA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/07/01 Vol. E85-C No. 7 pp. 1428-1435 Type of Manuscript: Special Section PAPER (Special Issue on Silicon RF Device & Integrated Circuit Technologies) Category: Keyword: voltage controlled oscillator, wireless communication, CMOS, SOI, double-tuning,
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Dynamically Programmable Parallel Processor (DPPP): A Novel Reconfigurable Architecture with Simple Program Interface Boon-Keat TAN Ryuji YOSHIMURA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2001/11/01 Vol. E84-D No. 11 pp. 1521-1527 Type of Manuscript: Special Section PAPER (Special Issue on Function Integrated Information Systems) Category: Keyword: CDMA bus, parallel processing, interconnection topology, routing flexibility, fault tolerant,
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A Novel Dynamically Programmable Arithmetic Array (DPAA) Processor for Digital Signal Processing Boon-Keat TAN Ryuji YOSHIMURA Toshimasa MATSUOKA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/03/01 Vol. E84-A No. 3 pp. 741-747 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 13th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: DPAA, DSP, parallel processing, interconnection topology, routing flexibility,
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A Reconfigurable Digital Signal Processor Boon Keat TAN Toru OGAWA Ryuji YOSHIMURA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/09/25 Vol. E81-C No. 9 pp. 1424-1430 Type of Manuscript: Special Section PAPER (Special Issue on Novel VLSI Processor Architectures) Category: Keyword: DSP processor, reconfigurable, flexible, processors array, fault-tolerant, ASIC, digital signal processing, RISC,
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FOREWORD Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/01/25 Vol. E81-C No. 1 pp. 1-1 Type of Manuscript: FOREWORD Category: Keyword:
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Asymmetric Single Electron Turnstile and Its Electronic Circuit Applications Masaharu KIRIHARA Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/01/25 Vol. E81-C No. 1 pp. 57-62 Type of Manuscript: Special Section PAPER (Special Issue on Technology Challenges for Single Electron Devices) Category: Keyword: single electron, turnstile, electronic circuit, winner-take-all, neuron, counter,
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A Low Power 622MHz CMOS Phase-Locked Loop with Source Coupled VCO and Dynamic PFD Hiroyasu YOSHIZAWA Kenji TANIGUCHI Hiroyuki SHIRAHAMA Kenichi NAKASHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/06/25 Vol. E80-A No. 6 pp. 1015-1020 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1996 International Technical Conference on Circuits/Systems, Computers and Communications(ITC-CSCC'96)) Category: Keyword: PLL, PFD, VCO, low power, source coupling, dynamic circuit,
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FOREWORD Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/03/25 Vol. E78-C No. 3 pp. 213-213 Type of Manuscript: FOREWORD Category: Keyword:
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Thickness Dependence of Furnace N₂O-Oxynitridation Effects on Breakdown of Thermal Oxides Toshimasa MATSUOKA Shigenari TAGUCHI Kenji TANIGUCHI Chihiro HAMAGUCHI Seizo KAKIMOTO Junkou TAKAGI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/03/25 Vol. E78-C No. 3 pp. 248-254 Type of Manuscript: Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies) Category: Keyword: N₂O-oxynitridation, charge-to-breakdown, thin dielectrics, MOS structure, dielectric reliability,
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Nonlocal Impact Ionization Model and Its Application to Substrate Current Simulation of n-MOSFET's Ken-ichiro SONODA Mitsuru YAMAJI Kenji TANIGUCHI Chihiro HAMAGUCHI Tatsuya KUNIKIYO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/03/25 Vol. E78-C No. 3 pp. 274-280 Type of Manuscript: Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies) Category: Keyword: nonlocal impact ionization, substrate current, Monte Carlo simulation, device simulation, drift-diffusion model,
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Computer Simulation of Jitter Characteristics of PLL for Arbitrary Data and Jitter Patterns Kenichi NAKASHI Hiroyuki SHIRAHAMA Kenji TANIGUCHI Osamu TSUKAHARA Tohru EZAKI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/06/25 Vol. E77-A No. 6 pp. 977-984 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1993 Joint Technical Conference on Circuits/Systems, Computers and Communications (JTC-CSCC'93)) Category: Analog Circuits and Signal Processing Keyword: PLL, jitter, time-domain simulation, phase detector, NRZ, retiming,
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FOREWORD Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/02/25 Vol. E75-C No. 2 pp. 127-127 Type of Manuscript: FOREWORD Category: Keyword:
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A Method for Extracting Nucleoli from Leukocyte Images Kenji TANIGUCHI Yukihiro HIGASHIWAKI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1986/08/25 Vol. E69-E No. 8 pp. 883-889 Type of Manuscript: PAPER Category: Pattern Recognition and Learning Keyword:
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Three-Dimensional Simulation of Hot Carrier Effects in Submicron MOSFETs Naoyuki SHIGYO Shinji ONGA Makoto YOSHIMI Kenji TANIGUCHI
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1986/04/25 Vol. E69-E No. 4 pp. 248-250 Type of Manuscript: Special Section LETTER (Special Issue: Papers from 1986 National Convention IECE Japan) Category: Silicon Devices and Integrated Circuits Keyword:
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