Kenji TANAKA


Design of a 45 Gb/s, 98 fJ/bit, 0.02 mm2 Transimpedance Amplifier with Peaking-Dedicated Inductor in 65-nm CMOS
Akira TSUCHIYA Akitaka HIRATSUKA Kenji TANAKA Hiroyuki FUKUYAMA Naoki MIURA Hideyuki NOSAKA Hidetoshi ONODERA 
Publication:   
Publication Date: 2020/10/01
Vol. E103-C  No. 10  pp. 489-496
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: Integrated Electronics
Keyword: 
optical communicationtransimpedance amplifierinductive peakingon-chip inductor
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Failure Diagnosis Utilizing the Series/Parallel Structure of Systems
Masato TAKAHASHI Kenji TANAKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/05/25
Vol. E83-A  No. 5  pp. 788-795
Type of Manuscript:  Special Section PAPER (Special Section on Reliability Theory and Its Applications)
Category: 
Keyword: 
system diagnosisminimal cut setmaintenance costtwo states system analysis
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Optimal Free-Sensors Allocation Problem in Safety Monitoring System
Kenji TANAKA Keiko SAITOH 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/01/25
Vol. E77-A  No. 1  pp. 237-239
Type of Manuscript:  Special Section LETTER (Special Section on Reliability)
Category: Reliability and Safety
Keyword: 
sensor system monitoringtwo failure modeoptimal allocation problemstochastic model
 Summary | Full Text:PDF