Kenichi YASUDA


A Mixed-Mode Voltage Down Converter with Impedance Adjustment Circuitry for Low-Voltage High-Frequency Memories
Tsukasa OOISHI Yuichiro KOMIYA Kei HAMADE Mikio ASAKURA Kenichi YASUDA Kiyohiro FURUTANI Tetsuo KATO Hideto HIDAKA Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/07/25
Vol. E79-C  No. 7  pp. 986-996
Type of Manuscript:  Special Section PAPER (Special Issue on the 1995 Symposium on VLSI Circuits (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.31, No.4 April 1996))
Category: Memory
Keyword: 
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An Automatic Temperature Compensation of Internal Sense Ground for Subquarter Micron DRAM's
Tsukasa OOISHI Yuichiro KOMIYA Kei HAMADE Mikio ASAKURA Kenichi YASUDA Kiyohiro FURUTANI Hideto HIDAKA Hiroshi MIYAMOTO Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/06/25
Vol. E78-C  No. 6  pp. 719-727
Type of Manuscript:  Special Section PAPER (Special Issue on the 1994 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol. 30, No. 4 April 1995))
Category: 
Keyword: 
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An Intelligent Cache Memory Chip Suitable for Logical Inference
Kenichi YASUDA Kiyohiro FURUTANI Atsushi MAEDA Shoichi WAKANO Hiroshi NAKASHIMA Yasutaka TAKEDA Michihiro YAMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1991/11/25
Vol. E74-C  No. 11  pp. 3796-3802
Type of Manuscript:  Special Section PAPER (Special Issue on the High Performance ASIC and Microprocessor)
Category: System VLSI
Keyword: 
 Summary | Full Text:PDF