Kenichi OHHATA


1-GHz, 17.5-mW, 8-bit Subranging ADC Using Offset-Cancelling Charge-Steering Amplifier
Kenichi OHHATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C  No. 4  pp. 289-297
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
analog-to-digital converteroffset cancellationcharge-steering amplifiercapacitive averagingresistor ladder
 Summary | Full Text:PDF

Low-Offset, Low-Power Latched Comparator Using Capacitive Averaging Technique
Kenichi OHHATA Hiroki DATE Mai ARITA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/12/01
Vol. E94-C  No. 12  pp. 1889-1895
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
comparatoroffset voltagecapacitive averaginganalog-to-digital convertor
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Sandwich Structure Type RF-MEMS Variable Capacitor with Low Voltage Controllability and Wide Tuning Range
Takuma NISHIMOTO Kiichi YAMASHITA Kenichi OHHATA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2008/02/01
Vol. E91-B  No. 2  pp. 572-574
Type of Manuscript:  LETTER
Category: Devices/Circuits for Communications
Keyword: 
MEMSRF-MEMSvariable capacitor
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Design of Low-Noise, Low-Power 10-GHz VCO Using 0.18-µm CMOS Technology
Kenichi OHHATA Katsuyoshi HARASAWA Makoto HONDA Kiichi YAMASHITA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/02/01
Vol. E89-C  No. 2  pp. 203-205
Type of Manuscript:  LETTER
Category: Microwaves, Millimeter-Waves
Keyword: 
VCOCMOS10 GHz
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Design of a 2-ns Cycle Time 72-kb ECL-CMOS SRAM Macro
Kenichi OHHATA Takeshi KUSUNOKI Hiroaki NAMBU Kazuo KANETANI Keiichi HIGETA Kunihiko YAMAGUCHI Noriyuki HOMMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/03/25
Vol. E81-C  No. 3  pp. 447-454
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
high-speed SRAMECL-CMOS SRAMwrite pulse generator
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A BiCMOS Circuit Using a Base-Boost Technique for Low-Voltage, Low-Power Application
Kenichi OHHATA Hiroaki NAMBU Kazuo KANETANI Toru MASUDA Takeshi KUSUNOKI Noriyuki HOMMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/12/25
Vol. E79-C  No. 12  pp. 1658-1665
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power LSI Technologies)
Category: 
Keyword: 
BiCMOSlow-voltagelow-Power
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Redundancy Circuit for a Sub-nanosecond, Megabit ECL-CMOSSRAM
Kenichi OHHATA Takeshi KUSUNOKI Hiroaki NAMBU Kazuo KANETANI Toru MASUDA Masayuki OHAYASHI Satomi HAMAMOTO Kunihiko YAMAGUCHI Youji IDEI Noriyuki HOMMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/03/25
Vol. E79-C  No. 3  pp. 415-423
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
redundancyECL-CMOS SRAMSRAM with logic gateBiCMOS
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A 0.65-ns, 72-kb ECL-CMOS RAM Macro for a 1-Mb SRAM
Hiroaki NAMBU Kazuo KANETANI Youji IDEI Toru MASUDA Keiichi HIGETA Masayuki OHAYASHI Masami USAMI Kunihiko YAMAGUCHI Toshiyuki KIKUCHI Takahide IKEDA Kenichi OHHATA Takeshi KUSUNOKI Noriyuki HOMMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/06/25
Vol. E78-C  No. 6  pp. 739-747
Type of Manuscript:  Special Section PAPER (Special Issue on the 1994 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol. 30, No. 4 April 1995))
Category: 
Keyword: 
 Summary | Full Text:PDF

Noise Reduction Techniques for a 64-kb ECL-CMOS SRAM with a 2-ns Cycle Time
Kenichi OHHATA Yoshiaki SAKURAI Hiroaki NAMBU Kazuo KANETANI Youji IDEI Toshirou HIRAMOTO Nobuo TAMBA Kunihiko YAMAGUCHI Masanori ODAKA Kunihiko WATANABE Takahide IKEDA Noriyuki HOMMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/11/25
Vol. E76-C  No. 11  pp. 1611-1619
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: SRAM
Keyword: 
ECL-CMOS SRAM64-kbnoise reductioncrosstalk
 Summary | Full Text:PDF

Redundancy Technique for Ultra-High-Speed Static RAMs
Hiroaki NAMBU Kazuo KANETANI Youji IDEI Kunihiko YAMAGUCHI Toshirou HIRAMOTO Nobuo TAMBA Kunihiko WATANABE Masanori ODAKA Takahide IKEDA Kenichi OHHATA Yoshiaki SAKURAI Noriyuki HOMMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/25
Vol. E76-C  No. 4  pp. 641-648
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
redundancy techniquestatic RAM (SRAM)focused ion beam (FIB)laser chemical vapor deposition (L-CVD)access time
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High-Speed Sensing Techniques for Ultrahigh-Speed SRAM's
Hiroaki NAMBU Kazuo KANETANI Youji IDEI Noriyuki HOMMA Kunihiko YAMAGUCHI Toshirou HIRAMOTO Nobuo TAMBA Masanori ODAKA Kunihiko WATANABE Takahide IKEDA Kenichi OHHATA Yoshiaki SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/04/25
Vol. E75-C  No. 4  pp. 530-538
Type of Manuscript:  Special Section PAPER (Joint Special Issue on the 1991 VLSI Circuits Symposium)
Category: 
Keyword: 
 Summary | Full Text:PDF

Alpha-Particle-Induced Charge Amplification by Parasitic npn Transistor in Ultra-High-Speed Bipolar RAMs
Hiroaki NAMBU Youji IDEI Kazuo KANETANI Kunihiko YAMAGUCHI Noriyuki HOMMA Kenichi OHHATA Yoshiaki SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1991/04/25
Vol. E74-C  No. 4  pp. 839-844
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: SRAM
Keyword: 
 Summary | Full Text:PDF