Kengo NAKATA


Weight Compression MAC Accelerator for Effective Inference of Deep Learning
Asuka MAKI Daisuke MIYASHITA Shinichi SASAKI Kengo NAKATA Fumihiko TACHIBANA Tomoya SUZUKI Jun DEGUCHI Ryuichi FUJIMOTO 
Publication:   
Publication Date: 2020/10/01
Vol. E103-C  No. 10  pp. 514-523
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: Integrated Electronics
Keyword: 
deep learningconvolutional neural networkquantizationvariable bit widthpost-traininginferenceacceleratorprocessorFPGA
 Summary | Full Text:PDF

A 28-GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G Mobile Communications in 65nm CMOS
Hanli LIU Teerachot SIRIBURANON Kengo NAKATA Wei DENG Ju Ho SON Dae Young LEE Kenichi OKADA Akira MATSUZAWA 
Publication:   
Publication Date: 2018/04/01
Vol. E101-C  No. 4  pp. 187-196
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
5G communicationsCMOS28GHzfractional-N frequency synthesizerphase noisespur
 Summary | Full Text:PDF

A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI
Dongsheng YANG Tomohiro UENO Wei DENG Yuki TERASHIMA Kengo NAKATA Aravind Tharayil NARAYANAN Rui WU Kenichi OKADA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/06/01
Vol. E99-C  No. 6  pp. 632-640
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
AD-PLLsynthesizablestochastic TDCstandard cellautomatic place-and-route
 Summary | Full Text:PDF