Keiichi KOIKE


A CAD-Based Low-Power Design Methodology for Very High-Speed Si Bipolar Standard Cell LSIs
Keiichi KOIKE Kenji KAWAI Akira ONOZAWA Yuichiro TAKEI Yoshiji KOBAYASHI Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/25
Vol. E80-C  No. 12  pp. 1578-1585
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
Si bipolarECLstandard cellCADSDH
 Summary | Full Text:PDF

A 1-GHz/0.9-mW CMOS/SIMOX Divide-by-128/129 Dual-Modulus Prescaler Using a Divide-by-2/3 Synchronous Counter
Yuichi KADO Masao SUZUKI Keiichi KOIKE Yasuhisa OMURA Katsutoshi IZUMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/05/25
Vol. E76-C  No. 5  pp. 853-857
Type of Manuscript:  Special Section LETTER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993))
Category: 
Keyword: 
 Summary | Full Text:PDF

An Experimental Full-CMOS Multigigahertz PLL LSI Using 0.4-µm Gate Ultrathin-Film SIMOX Technology
Yuichi KADO Masao SUZUKI Keiichi KOIKE Yasuhisa OMURA Katsutoshi IZUMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/25
Vol. E76-C  No. 4  pp. 562-571
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Category: Device Technology
Keyword: 
integrated electronicssemiconductor materials and devicesCMOSSOISIMOXphase locked loop
 Summary | Full Text:PDF